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Vedant Kumar 55c3504da4 [LiveDebugValues] Encode register location within VarLoc IDs [3/3]
This is part 3 of a 3-part series to address a compile-time explosion
issue in LiveDebugValues.

---

Start encoding register locations within VarLoc IDs, and take advantage
of this encoding to speed up transferRegisterDef.

There is no fundamental algorithmic change: this patch simply swaps out
SparseBitVector in favor of CoalescingBitVector. That changes iteration
order (hence the test updates), but otherwise this patch is NFCI.

The only interesting change is in transferRegisterDef. Instead of doing:

```
KillSet = {}
for (ID : OpenRanges.getVarLocs())
  if (DeadRegs.count(ID))
    KillSet.add(ID)
```

We now do:

```
KillSet = {}
for (Reg : DeadRegs)
  for (ID : intervalsReservedForReg(Reg, OpenRanges.getVarLocs()))
    KillSet.add(ID)
```

By not visiting each open location every time we visit an instruction,
this eliminates some potentially quadratic behavior. The new
implementation basically does a constant amount of work per instruction
because the interval map lookups are very fast.

For a file in WebKit, this brings the time spent in LiveDebugValues down
from ~2.5 minutes to 4 seconds, reducing compile time spent in that pass
from 28% of the total to just over 1%.

Before:

```
2.49 min   27.8%	0 s	LiveDebugValues::process
2.41 min   27.0%	5.40 s	LiveDebugValues::transferRegisterDef
1.51 min   16.9%	1.51 min LiveDebugValues::VarLoc::isDescribedByReg() const
32.73 s    6.1%		8.70 s	 llvm::SparseBitVector<128u>::SparseBitVectorIterator::operator++()
```

After:

```
4.53 s	1.1%	0 s	LiveDebugValues::process
3.00 s	0.7%	107.00 ms		LiveDebugValues::transferRegisterCopy
892.00 ms	0.2%	406.00 ms	LiveDebugValues::transferSpillOrRestoreInst
404.00 ms	0.1%	32.00 ms	LiveDebugValues::transferRegisterDef
110.00 ms	0.0%	2.00 ms		  LiveDebugValues::getUsedRegs
57.00 ms	0.0%	1.00 ms		  std::__1::vector<>::push_back
40.00 ms	0.0%	1.00 ms		  llvm::CoalescingBitVector<>::find(unsigned long long)
```

FWIW, I tried the same approach using SparseBitVector, but got bad
results. To do that, I had to extend SparseBitVector to support 64-bit
indices and expose its lower bound operation. The problem with this is
that the performance is very hard to predict: SparseBitVector's lower
bound operation falls back to O(n) linear scans in a std::list if you're
not /very/ careful about managing iteration order. When I profiled this
the performance looked worse than the baseline.

You can see the full CoalescingBitVector-based implementation here:

  https://github.com/vedantk/llvm-project/commits/try-coalescing

You can see the full SparseBitVector-based implementation here:

  https://github.com/vedantk/llvm-project/commits/try-sparsebitvec-find

Depends on D74984 and D74985.

Differential Revision: https://reviews.llvm.org/D74986
2020-02-27 12:39:47 -08:00
benchmarks
bindings [LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints 2020-02-24 20:15:51 +01:00
cmake Add llvm-cov to LLVM_TOOLCHAIN_TOOLS 2020-02-25 10:59:55 +01:00
docs [ADT] Add CoalescingBitVector, implemented using IntervalMap [1/3] 2020-02-27 12:39:46 -08:00
examples [ORC][examples] Fix ThinLtoJIT example after changes in 85fb997659b. 2020-02-20 11:15:08 -08:00
include [ADT] Add CoalescingBitVector, implemented using IntervalMap [1/3] 2020-02-27 12:39:46 -08:00
lib [LiveDebugValues] Encode register location within VarLoc IDs [3/3] 2020-02-27 12:39:47 -08:00
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runtimes [runtimes] Add umbrella targets for runtimes 2020-02-12 09:46:14 -08:00
test [LiveDebugValues] Encode register location within VarLoc IDs [3/3] 2020-02-27 12:39:47 -08:00
tools [llvm-objcopy] Enable --discard-all for MachO 2020-02-26 12:51:15 -08:00
unittests [ADT] Add CoalescingBitVector, implemented using IntervalMap [1/3] 2020-02-27 12:39:46 -08:00
utils [gn build] Port 3c36d8dad57 2020-02-26 16:09:48 +00:00
.clang-format
.clang-tidy - Update .clang-tidy to ignore parameters of main like functions for naming violations in clang and llvm directory 2020-01-31 16:49:45 +00:00
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.gitignore Continue removing llgo. 2020-02-10 10:33:58 -08:00
CMakeLists.txt [AIX] Improve 32/64-bit build configuration 2020-02-20 15:41:00 -05:00
CODE_OWNERS.TXT Remove myself from CODE_OWNERS. 2020-02-25 11:59:29 +00:00
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