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llvm-mirror/test/CodeGen/ARM/rbit.ll
Yi Kong 57329b1cc2 ARM: Fix codegen for rbit intrinsic
LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic.
According to ARM ARM, rbit only takes register as argument, not immediate.
The correct instruction should be rbit <Rd>, <Rm>.

The bug was originally introduced in r211057.

Differential Revision: http://reviews.llvm.org/D4980

llvm-svn: 216064
2014-08-20 10:40:20 +00:00

21 lines
394 B
LLVM

; RUN: llc -mtriple=armv8-eabi %s -o - | FileCheck %s
; CHECK-LABEL: rbit
; CHECK: rbit r0, r0
define i32 @rbit(i32 %t) {
entry:
%rbit = call i32 @llvm.arm.rbit(i32 %t)
ret i32 %rbit
}
; CHECK-LABEL: rbit_constant
; CHECK: mov r0, #0
; CHECK: rbit r0, r0
define i32 @rbit_constant() {
entry:
%rbit.i = call i32 @llvm.arm.rbit(i32 0)
ret i32 %rbit.i
}
declare i32 @llvm.arm.rbit(i32)