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llvm-mirror/test/CodeGen/XCore/inline-asm.ll
Richard Osborne 7d4ecf1273 [XCore] Add support for the "m" inline asm constraint.
Summary:
This provides support for CP and DP relative global accesses in inline
asm.

Reviewers: robertlytton

Reviewed By: robertlytton

Differential Revision: http://llvm-reviews.chandlerc.com/D2943

llvm-svn: 203129
2014-03-06 16:37:48 +00:00

54 lines
1.1 KiB
LLVM

; RUN: llc < %s -march=xcore | FileCheck %s
; CHECK-LABEL: f1:
; CHECK: foo r0
define i32 @f1() nounwind {
entry:
%asmtmp = tail call i32 asm sideeffect "foo $0", "=r"() nounwind
ret i32 %asmtmp
}
; CHECK-LABEL: f2:
; CHECK: foo 5
define void @f2() nounwind {
entry:
tail call void asm sideeffect "foo $0", "i"(i32 5) nounwind
ret void
}
; CHECK-LABEL: f3:
; CHECK: foo 42
define void @f3() nounwind {
entry:
tail call void asm sideeffect "foo ${0:c}", "i"(i32 42) nounwind
ret void
}
; CHECK-LABEL: f4:
; CHECK: foo -99
define void @f4() nounwind {
entry:
tail call void asm sideeffect "foo ${0:n}", "i"(i32 99) nounwind
ret void
}
@x = external global i32
@y = external global i32, section ".cp.rodata"
; CHECK-LABEL: f5:
; CHECK: ldw r0, dp[x]
; CHECK: retsp 0
define i32 @f5() nounwind {
entry:
%asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* @x) nounwind
ret i32 %asmtmp
}
; CHECK-LABEL: f6:
; CHECK: ldw r0, cp[y]
; CHECK: retsp 0
define i32 @f6() nounwind {
entry:
%asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* @y) nounwind
ret i32 %asmtmp
}