mirror of
https://github.com/RPCS3/llvm-mirror.git
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3f31269929
This patch adds support for following contiguous load and store instructions: * LD1B, LD1H, LD1W, LD1D, LD1Q * ST1B, ST1H, ST1W, ST1D, ST1Q A new register class and operand is added for the 32-bit vector select register W12-W15. The differences in the following tests which have been re-generated are caused by the introduction of this register class: * llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll * llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir * llvm/test/CodeGen/AArch64/stp-opt-with-renaming-reserved-regs.mir * llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir D88663 attempts to resolve the issue with the store pair test differences in the AArch64 load/store optimizer. The GlobalISel differences are caused by changes in the enum values of register classes, tests have been updated with the new values. The reference can be found here: https://developer.arm.com/documentation/ddi0602/2021-06 Reviewed By: CarolineConcatto Differential Revision: https://reviews.llvm.org/D105572
308 lines
11 KiB
ArmAsm
308 lines
11 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
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// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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// Disassemble encoding and check the re-encoding (-show-encoding) matches.
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
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// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
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// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// --------------------------------------------------------------------------//
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// Horizontal
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st1b {za0h.b[w12, #0]}, p0, [x0, x0]
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// CHECK-INST: st1b {za0h.b[w12, #0]}, p0, [x0, x0]
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// CHECK-ENCODING: [0x00,0x00,0x20,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 00 00 20 e0 <unknown>
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st1b {za0h.b[w14, #5]}, p5, [x10, x21]
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// CHECK-INST: st1b {za0h.b[w14, #5]}, p5, [x10, x21]
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// CHECK-ENCODING: [0x45,0x55,0x35,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 45 55 35 e0 <unknown>
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st1b {za0h.b[w15, #7]}, p3, [x13, x8]
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// CHECK-INST: st1b {za0h.b[w15, #7]}, p3, [x13, x8]
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// CHECK-ENCODING: [0xa7,0x6d,0x28,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: a7 6d 28 e0 <unknown>
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st1b {za0h.b[w15, #15]}, p7, [sp]
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// CHECK-INST: st1b {za0h.b[w15, #15]}, p7, [sp]
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// CHECK-ENCODING: [0xef,0x7f,0x3f,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: ef 7f 3f e0 <unknown>
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st1b {za0h.b[w12, #5]}, p3, [x17, x16]
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// CHECK-INST: st1b {za0h.b[w12, #5]}, p3, [x17, x16]
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// CHECK-ENCODING: [0x25,0x0e,0x30,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 25 0e 30 e0 <unknown>
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st1b {za0h.b[w12, #1]}, p1, [x1, x30]
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// CHECK-INST: st1b {za0h.b[w12, #1]}, p1, [x1, x30]
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// CHECK-ENCODING: [0x21,0x04,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 04 3e e0 <unknown>
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st1b {za0h.b[w14, #8]}, p5, [x19, x20]
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// CHECK-INST: st1b {za0h.b[w14, #8]}, p5, [x19, x20]
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// CHECK-ENCODING: [0x68,0x56,0x34,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 68 56 34 e0 <unknown>
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st1b {za0h.b[w12, #0]}, p6, [x12, x2]
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// CHECK-INST: st1b {za0h.b[w12, #0]}, p6, [x12, x2]
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// CHECK-ENCODING: [0x80,0x19,0x22,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 80 19 22 e0 <unknown>
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st1b {za0h.b[w14, #1]}, p2, [x1, x26]
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// CHECK-INST: st1b {za0h.b[w14, #1]}, p2, [x1, x26]
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// CHECK-ENCODING: [0x21,0x48,0x3a,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 48 3a e0 <unknown>
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st1b {za0h.b[w12, #13]}, p2, [x22, x30]
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// CHECK-INST: st1b {za0h.b[w12, #13]}, p2, [x22, x30]
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// CHECK-ENCODING: [0xcd,0x0a,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: cd 0a 3e e0 <unknown>
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st1b {za0h.b[w15, #2]}, p5, [x9, x1]
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// CHECK-INST: st1b {za0h.b[w15, #2]}, p5, [x9, x1]
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// CHECK-ENCODING: [0x22,0x75,0x21,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 22 75 21 e0 <unknown>
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st1b {za0h.b[w13, #7]}, p2, [x12, x11]
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// CHECK-INST: st1b {za0h.b[w13, #7]}, p2, [x12, x11]
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// CHECK-ENCODING: [0x87,0x29,0x2b,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 87 29 2b e0 <unknown>
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st1b za0h.b[w12, #0], p0, [x0, x0]
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// CHECK-INST: st1b {za0h.b[w12, #0]}, p0, [x0, x0]
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// CHECK-ENCODING: [0x00,0x00,0x20,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 00 00 20 e0 <unknown>
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st1b za0h.b[w14, #5], p5, [x10, x21]
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// CHECK-INST: st1b {za0h.b[w14, #5]}, p5, [x10, x21]
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// CHECK-ENCODING: [0x45,0x55,0x35,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 45 55 35 e0 <unknown>
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st1b za0h.b[w15, #7], p3, [x13, x8]
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// CHECK-INST: st1b {za0h.b[w15, #7]}, p3, [x13, x8]
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// CHECK-ENCODING: [0xa7,0x6d,0x28,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: a7 6d 28 e0 <unknown>
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st1b za0h.b[w15, #15], p7, [sp]
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// CHECK-INST: st1b {za0h.b[w15, #15]}, p7, [sp]
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// CHECK-ENCODING: [0xef,0x7f,0x3f,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: ef 7f 3f e0 <unknown>
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st1b za0h.b[w12, #5], p3, [x17, x16]
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// CHECK-INST: st1b {za0h.b[w12, #5]}, p3, [x17, x16]
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// CHECK-ENCODING: [0x25,0x0e,0x30,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 25 0e 30 e0 <unknown>
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st1b za0h.b[w12, #1], p1, [x1, x30]
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// CHECK-INST: st1b {za0h.b[w12, #1]}, p1, [x1, x30]
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// CHECK-ENCODING: [0x21,0x04,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 04 3e e0 <unknown>
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st1b za0h.b[w14, #8], p5, [x19, x20]
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// CHECK-INST: st1b {za0h.b[w14, #8]}, p5, [x19, x20]
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// CHECK-ENCODING: [0x68,0x56,0x34,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 68 56 34 e0 <unknown>
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st1b za0h.b[w12, #0], p6, [x12, x2]
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// CHECK-INST: st1b {za0h.b[w12, #0]}, p6, [x12, x2]
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// CHECK-ENCODING: [0x80,0x19,0x22,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 80 19 22 e0 <unknown>
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st1b za0h.b[w14, #1], p2, [x1, x26]
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// CHECK-INST: st1b {za0h.b[w14, #1]}, p2, [x1, x26]
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// CHECK-ENCODING: [0x21,0x48,0x3a,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 48 3a e0 <unknown>
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st1b za0h.b[w12, #13], p2, [x22, x30]
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// CHECK-INST: st1b {za0h.b[w12, #13]}, p2, [x22, x30]
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// CHECK-ENCODING: [0xcd,0x0a,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: cd 0a 3e e0 <unknown>
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st1b za0h.b[w15, #2], p5, [x9, x1]
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// CHECK-INST: st1b {za0h.b[w15, #2]}, p5, [x9, x1]
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// CHECK-ENCODING: [0x22,0x75,0x21,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 22 75 21 e0 <unknown>
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st1b za0h.b[w13, #7], p2, [x12, x11]
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// CHECK-INST: st1b {za0h.b[w13, #7]}, p2, [x12, x11]
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// CHECK-ENCODING: [0x87,0x29,0x2b,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 87 29 2b e0 <unknown>
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// --------------------------------------------------------------------------//
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// Vertical
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st1b {za0v.b[w12, #0]}, p0, [x0, x0]
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// CHECK-INST: st1b {za0v.b[w12, #0]}, p0, [x0, x0]
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// CHECK-ENCODING: [0x00,0x80,0x20,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 00 80 20 e0 <unknown>
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st1b {za0v.b[w14, #5]}, p5, [x10, x21]
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// CHECK-INST: st1b {za0v.b[w14, #5]}, p5, [x10, x21]
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// CHECK-ENCODING: [0x45,0xd5,0x35,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 45 d5 35 e0 <unknown>
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st1b {za0v.b[w15, #7]}, p3, [x13, x8]
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// CHECK-INST: st1b {za0v.b[w15, #7]}, p3, [x13, x8]
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// CHECK-ENCODING: [0xa7,0xed,0x28,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: a7 ed 28 e0 <unknown>
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st1b {za0v.b[w15, #15]}, p7, [sp]
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// CHECK-INST: st1b {za0v.b[w15, #15]}, p7, [sp]
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// CHECK-ENCODING: [0xef,0xff,0x3f,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: ef ff 3f e0 <unknown>
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st1b {za0v.b[w12, #5]}, p3, [x17, x16]
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// CHECK-INST: st1b {za0v.b[w12, #5]}, p3, [x17, x16]
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// CHECK-ENCODING: [0x25,0x8e,0x30,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 25 8e 30 e0 <unknown>
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st1b {za0v.b[w12, #1]}, p1, [x1, x30]
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// CHECK-INST: st1b {za0v.b[w12, #1]}, p1, [x1, x30]
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// CHECK-ENCODING: [0x21,0x84,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 84 3e e0 <unknown>
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st1b {za0v.b[w14, #8]}, p5, [x19, x20]
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// CHECK-INST: st1b {za0v.b[w14, #8]}, p5, [x19, x20]
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// CHECK-ENCODING: [0x68,0xd6,0x34,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 68 d6 34 e0 <unknown>
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st1b {za0v.b[w12, #0]}, p6, [x12, x2]
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// CHECK-INST: st1b {za0v.b[w12, #0]}, p6, [x12, x2]
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// CHECK-ENCODING: [0x80,0x99,0x22,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 80 99 22 e0 <unknown>
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st1b {za0v.b[w14, #1]}, p2, [x1, x26]
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// CHECK-INST: st1b {za0v.b[w14, #1]}, p2, [x1, x26]
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// CHECK-ENCODING: [0x21,0xc8,0x3a,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 c8 3a e0 <unknown>
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st1b {za0v.b[w12, #13]}, p2, [x22, x30]
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// CHECK-INST: st1b {za0v.b[w12, #13]}, p2, [x22, x30]
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// CHECK-ENCODING: [0xcd,0x8a,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: cd 8a 3e e0 <unknown>
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st1b {za0v.b[w15, #2]}, p5, [x9, x1]
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// CHECK-INST: st1b {za0v.b[w15, #2]}, p5, [x9, x1]
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// CHECK-ENCODING: [0x22,0xf5,0x21,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 22 f5 21 e0 <unknown>
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st1b {za0v.b[w13, #7]}, p2, [x12, x11]
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// CHECK-INST: st1b {za0v.b[w13, #7]}, p2, [x12, x11]
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// CHECK-ENCODING: [0x87,0xa9,0x2b,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 87 a9 2b e0 <unknown>
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st1b za0v.b[w12, #0], p0, [x0, x0]
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// CHECK-INST: st1b {za0v.b[w12, #0]}, p0, [x0, x0]
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// CHECK-ENCODING: [0x00,0x80,0x20,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 00 80 20 e0 <unknown>
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st1b za0v.b[w14, #5], p5, [x10, x21]
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// CHECK-INST: st1b {za0v.b[w14, #5]}, p5, [x10, x21]
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// CHECK-ENCODING: [0x45,0xd5,0x35,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 45 d5 35 e0 <unknown>
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st1b za0v.b[w15, #7], p3, [x13, x8]
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// CHECK-INST: st1b {za0v.b[w15, #7]}, p3, [x13, x8]
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// CHECK-ENCODING: [0xa7,0xed,0x28,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: a7 ed 28 e0 <unknown>
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st1b za0v.b[w15, #15], p7, [sp]
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// CHECK-INST: st1b {za0v.b[w15, #15]}, p7, [sp]
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// CHECK-ENCODING: [0xef,0xff,0x3f,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: ef ff 3f e0 <unknown>
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st1b za0v.b[w12, #5], p3, [x17, x16]
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// CHECK-INST: st1b {za0v.b[w12, #5]}, p3, [x17, x16]
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// CHECK-ENCODING: [0x25,0x8e,0x30,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 25 8e 30 e0 <unknown>
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st1b za0v.b[w12, #1], p1, [x1, x30]
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// CHECK-INST: st1b {za0v.b[w12, #1]}, p1, [x1, x30]
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// CHECK-ENCODING: [0x21,0x84,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 84 3e e0 <unknown>
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st1b za0v.b[w14, #8], p5, [x19, x20]
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// CHECK-INST: st1b {za0v.b[w14, #8]}, p5, [x19, x20]
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// CHECK-ENCODING: [0x68,0xd6,0x34,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 68 d6 34 e0 <unknown>
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st1b za0v.b[w12, #0], p6, [x12, x2]
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// CHECK-INST: st1b {za0v.b[w12, #0]}, p6, [x12, x2]
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// CHECK-ENCODING: [0x80,0x99,0x22,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 80 99 22 e0 <unknown>
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st1b za0v.b[w14, #1], p2, [x1, x26]
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// CHECK-INST: st1b {za0v.b[w14, #1]}, p2, [x1, x26]
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// CHECK-ENCODING: [0x21,0xc8,0x3a,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 21 c8 3a e0 <unknown>
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st1b za0v.b[w12, #13], p2, [x22, x30]
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// CHECK-INST: st1b {za0v.b[w12, #13]}, p2, [x22, x30]
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// CHECK-ENCODING: [0xcd,0x8a,0x3e,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: cd 8a 3e e0 <unknown>
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st1b za0v.b[w15, #2], p5, [x9, x1]
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// CHECK-INST: st1b {za0v.b[w15, #2]}, p5, [x9, x1]
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// CHECK-ENCODING: [0x22,0xf5,0x21,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 22 f5 21 e0 <unknown>
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st1b za0v.b[w13, #7], p2, [x12, x11]
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// CHECK-INST: st1b {za0v.b[w13, #7]}, p2, [x12, x11]
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// CHECK-ENCODING: [0x87,0xa9,0x2b,0xe0]
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// CHECK-ERROR: instruction requires: sme
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// CHECK-UNKNOWN: 87 a9 2b e0 <unknown>
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