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llvm-mirror/test/MC/AArch64/armv8.5a-bti-error.s
Oliver Stannard 5be239fc50 [AArch64][v8.5A] Add Branch Target Identification instructions
This adds new instructions used by the Branch Target Identification
feature. When this is enabled, these are the only instructions which can
be targeted by indirect branch instructions.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52485

llvm-svn: 343225
2018-09-27 14:54:33 +00:00

13 lines
304 B
ArmAsm

// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+bti < %s 2>&1 | FileCheck %s
bti cj
bti a
bti x0
// CHECK: invalid operand for instruction
// CHECK-NEXT: cj
// CHECK: invalid operand for instruction
// CHECK-NEXT: a
// CHECK: invalid operand for instruction
// CHECK-NEXT: x0