1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/test/MC/AVR/inst-fmul.s
Ayke van Laethem af22684b77 [AVR] Disassemble multiplication instructions
These can often only use a limited range of registers, and apparently
need special decoding support.

Differential Revision: https://reviews.llvm.org/D81971
2020-06-23 02:17:37 +02:00

27 lines
866 B
ArmAsm

; RUN: llvm-mc -triple avr -mattr=mul -show-encoding < %s | FileCheck %s
; RUN: llvm-mc -filetype=obj -triple avr -mattr=mul < %s | llvm-objdump -d --mattr=mul - | FileCheck -check-prefix=CHECK-INST %s
foo:
fmul r22, r16
fmul r19, r17
fmul r21, r23
fmul r23, r23
fmul r16, r16
fmul r16, r23
; CHECK: fmul r22, r16 ; encoding: [0x68,0x03]
; CHECK: fmul r19, r17 ; encoding: [0x39,0x03]
; CHECK: fmul r21, r23 ; encoding: [0x5f,0x03]
; CHECK: fmul r23, r23 ; encoding: [0x7f,0x03]
; CHECK: fmul r16, r16 ; encoding: [0x08,0x03]
; CHECK: fmul r16, r23 ; encoding: [0x0f,0x03]
; CHECK-INST: fmul r22, r16
; CHECK-INST: fmul r19, r17
; CHECK-INST: fmul r21, r23
; CHECK-INST: fmul r23, r23
; CHECK-INST: fmul r16, r16
; CHECK-INST: fmul r16, r23