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e24daf0c1e
This patch allows target shuffles to be combined to single input immediate permute instructions - (V)PSHUFD/VPERMILPD/VPERMILPS - allowing more general pattern matching than what we current do and improves the likelihood of memory folding compared to existing patterns which tend to reuse the input in multiple arguments. Further permute instructions (V)PSHUFLW/(V)PSHUFHW/(V)PERMQ/(V)PERMPD may be added in the future but its proven tricky to create tests cases for them so far. (V)PSHUFLW/(V)PSHUFHW is already handled quite well in combineTargetShuffle so it may be that removing some of that code may allow us to perform more of the combining in one place without duplication. Differential Revision: http://reviews.llvm.org/D21148 llvm-svn: 273999
60 lines
3.5 KiB
LLVM
60 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s
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; rdar://11314175: SD Scheduler, BuildSchedUnits assert:
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; N->getNodeId() == -1 && "Node already inserted!
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define void @func() nounwind ssp {
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; CHECK-LABEL: func:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovups 0, %xmm0
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; CHECK-NEXT: vxorps %ymm1, %ymm1, %ymm1
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; CHECK-NEXT: vblendps {{.*#+}} ymm2 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,2,3,3]
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; CHECK-NEXT: vbroadcastss 32, %xmm3
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; CHECK-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
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; CHECK-NEXT: vmulps %ymm0, %ymm2, %ymm2
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; CHECK-NEXT: vmulps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vaddps %ymm0, %ymm2, %ymm0
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; CHECK-NEXT: vaddps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vmulps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1]
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; CHECK-NEXT: vaddps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vhaddps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vsubps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vhaddps %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%rax)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%tmp = load <4 x float>, <4 x float>* null, align 1
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%tmp14 = getelementptr <4 x float>, <4 x float>* null, i32 2
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%tmp15 = load <4 x float>, <4 x float>* %tmp14, align 1
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%tmp16 = shufflevector <4 x float> %tmp, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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%tmp17 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp16, <4 x float> undef, i8 1)
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%tmp18 = bitcast <4 x float> %tmp to <16 x i8>
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%tmp19 = shufflevector <16 x i8> %tmp18, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>
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%tmp20 = bitcast <16 x i8> %tmp19 to <4 x float>
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%tmp21 = bitcast <4 x float> %tmp15 to <16 x i8>
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%tmp22 = shufflevector <16 x i8> undef, <16 x i8> %tmp21, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>
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%tmp23 = bitcast <16 x i8> %tmp22 to <4 x float>
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%tmp24 = shufflevector <4 x float> %tmp20, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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%tmp25 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp24, <4 x float> %tmp23, i8 1)
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%tmp26 = fmul <8 x float> %tmp17, undef
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%tmp27 = fmul <8 x float> %tmp25, undef
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%tmp28 = fadd <8 x float> %tmp26, %tmp27
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%tmp29 = fadd <8 x float> %tmp28, undef
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%tmp30 = shufflevector <8 x float> %tmp29, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%tmp31 = fmul <4 x float> undef, %tmp30
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%tmp32 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> zeroinitializer, <4 x float> %tmp31, i8 1)
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%tmp33 = fadd <8 x float> undef, %tmp32
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%tmp34 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %tmp33, <8 x float> undef) nounwind
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%tmp35 = fsub <8 x float> %tmp34, undef
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%tmp36 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> zeroinitializer, <8 x float> %tmp35) nounwind
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store <8 x float> %tmp36, <8 x float>* undef, align 32
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ret void
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}
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declare <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float>, <4 x float>, i8) nounwind readnone
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declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone
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