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207263b7e6
These nodes are only emitted for lowering FABS/FNEG/FNABS/FCOPYSIGN. Ideally we just wouldn't create these nodes if SSE2 or higher is available, but it was simple to just convert them in DAG combine. For SSE2, AVX, and AVX512 with DQI this is no functional change as the execution domain fixing pass ensures the right domain is selected regardless of the ISD opcode. For AVX-512 without DQI we end up using integer instructions since the floating point versions aren't available. But we were already doing that for any logical operations in code that didn't come from FABS/FNEG/FNABS/FCOPYSIGN so this seems no worse. And we get the benefit of being able to fold broadcasts now. llvm-svn: 290060
44 lines
1.2 KiB
LLVM
44 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-darwin | FileCheck %s
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; CHECK-LABEL: LCPI0_0:
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; CHECK-NEXT: .long 4286578688
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; CHECK-LABEL: LCPI0_1:
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; CHECK-NEXT: .long 2139095040
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define x86_fp80 @foo(x86_fp80 %a) {
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; CHECK-LABEL: foo:
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; CHECK: ## BB#0:
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: testb $-128, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: flds LCPI0_0(%rip)
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; CHECK-NEXT: flds LCPI0_1(%rip)
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; CHECK-NEXT: fcmovne %st(1), %st(0)
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; CHECK-NEXT: fstp %st(1)
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; CHECK-NEXT: retq
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;
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%1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone
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ret x86_fp80 %1
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}
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declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone
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; This would crash:
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; https://llvm.org/bugs/show_bug.cgi?id=26070
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define float @pr26070() {
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; CHECK-LABEL: pr26070:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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;
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%c = call float @copysignf(float 1.0, float undef) readnone
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ret float %c
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}
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declare float @copysignf(float, float)
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