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67b39f3e9e
This is a fix for https://llvm.org/bugs/show_bug.cgi?id=29010 Root cause of the bug is that the register class of the machine instruction operand does not fully reflect if this registers that can be allocated. Both for i386 and x86_64 the operand's register class is VR128RegClass and thus contains xmm0-xmm15, though in i386 we can only use xmm0-xmm8. In order to get the actual allocable registers of the class we need to use RegisterClassInfo. Differential Revision: https://reviews.llvm.org/D23613 llvm-svn: 278954
13 lines
536 B
LLVM
13 lines
536 B
LLVM
; RUN: llc < %s -mtriple=i386-linux -mattr=+avx | FileCheck %s
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; In i386 there are only 8 XMMs (xmm0-xmm7), make sure we we are not creating illegal XMM
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define float @only_xmm0_7(i32 %arg) {
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top:
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tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{dirflag},~{fpsr},~{flags}"()
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tail call void asm sideeffect "", "~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"()
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%tmp1 = sitofp i32 %arg to float
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ret float %tmp1
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;CHECK-LABEL:@only_xmm0_7
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;CHECK: vcvtsi2ssl {{.*}}, {{%xmm[0-7]+}}, {{%xmm[0-7]+}}
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}
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