Alex Lorenz 5694297a85 MIR Tests: Add liveins and successors to make tests pass with machine verifier. ... This commit adds the liveins and successors properties to machine basic blocks in some of the MIR tests to ensure that the tests will pass when the MIR parser will run the machine verifier after initializing a machine function. llvm-svn: 243124		2015-07-24 17:36:55 +00:00
..
AArch64	This patch eanble register coalescing to coalesce the following:	2015-07-23 19:24:53 +00:00
AMDGPU	AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops	2015-07-20 14:28:41 +00:00
ARM	[ARM] - Fix lowering of shufflevectors in AArch32	2015-07-24 09:57:05 +00:00
BPF
CPP
Generic	Targets: commonize some stack realignment code	2015-07-20 22:51:32 +00:00
Hexagon	[Hexagon] Generate MUX from conditional transfers when dot-new not possible	2015-07-20 21:23:25 +00:00
Inputs
Mips	[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)	2015-07-15 08:39:35 +00:00
MIR	MIR Tests: Add liveins and successors to make tests pass with machine verifier.	2015-07-24 17:36:55 +00:00
MSP430
NVPTX	[BranchFolding] do not iterate the aliases of virtual registers	2015-07-22 04:16:52 +00:00
PowerPC	Clean up function attributes on PPC fast-isel tests.	2015-07-24 01:07:50 +00:00
SPARC	[SPARC] Cleanup handling of the Y/ASR registers.	2015-07-08 16:25:12 +00:00
SystemZ
Thumb	[ARM] Make the frame lowering code ready for shrink-wrapping.	2015-07-22 16:34:37 +00:00
Thumb2	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
WebAssembly	WebAssembly: test that valid -mcpu flags are accepted.	2015-07-23 23:00:04 +00:00
WinEH	[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name	2015-07-13 17:55:14 +00:00
X86	AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation	2015-07-24 17:24:15 +00:00
XCore