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b4d0707b26
Without that check it was possible to write test cases where the size was not specified and we ended up with weird asserts down the road, because the default value (1) would not make sense. llvm-svn: 272226
103 lines
4.0 KiB
C++
103 lines
4.0 KiB
C++
//===- MIParser.h - Machine Instructions Parser ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the function that parses the machine instructions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
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#define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallSet.h"
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namespace llvm {
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class StringRef;
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class BasicBlock;
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class MachineBasicBlock;
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class MachineInstr;
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class MachineFunction;
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class MDNode;
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struct SlotMapping;
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class SMDiagnostic;
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class SourceMgr;
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struct PerFunctionMIParsingState {
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DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
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DenseMap<unsigned, unsigned> VirtualRegisterSlots;
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DenseMap<unsigned, int> FixedStackObjectSlots;
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DenseMap<unsigned, int> StackObjectSlots;
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DenseMap<unsigned, unsigned> ConstantPoolSlots;
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DenseMap<unsigned, unsigned> JumpTableSlots;
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/// Hold the generic virtual registers.
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SmallSet<unsigned, 8> GenericVRegs;
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};
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/// Parse the machine basic block definitions, and skip the machine
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/// instructions.
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///
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/// This function runs the first parsing pass on the machine function's body.
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/// It parses only the machine basic block definitions and creates the machine
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/// basic blocks in the given machine function.
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///
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/// The machine instructions aren't parsed during the first pass because all
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/// the machine basic blocks aren't defined yet - this makes it impossible to
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/// resolve the machine basic block references.
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///
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/// Return true if an error occurred.
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bool parseMachineBasicBlockDefinitions(MachineFunction &MF, StringRef Src,
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PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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/// Parse the machine instructions.
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///
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/// This function runs the second parsing pass on the machine function's body.
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/// It skips the machine basic block definitions and parses only the machine
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/// instructions and basic block attributes like liveins and successors.
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///
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/// The second parsing pass assumes that the first parsing pass already ran
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/// on the given source string.
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///
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/// Return true if an error occurred.
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bool parseMachineInstructions(MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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bool parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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bool parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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bool parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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bool parseStackObjectReference(int &FI, SourceMgr &SM, MachineFunction &MF,
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StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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bool parseMDNode(MDNode *&Node, SourceMgr &SM, MachineFunction &MF,
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StringRef Src, const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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} // end namespace llvm
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#endif
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