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llvm-mirror/test/CodeGen/Mips/2008-07-15-SmallSection.ll
Chris Lattner 4cebf6ca28 reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900
2009-08-13 06:28:06 +00:00

33 lines
1.0 KiB
LLVM

; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -f -o %t0
; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -f -o %t1
; RUN: grep {sdata} %t0 | count 1
; RUN: grep {sbss} %t0 | count 1
; RUN: grep {gp_rel} %t0 | count 2
; RUN: not grep {sdata} %t1
; RUN: not grep {sbss} %t1
; RUN: not grep {gp_rel} %t1
; RUN: grep {\%hi} %t1 | count 2
; RUN: grep {\%lo} %t1 | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-psp-elf"
%struct.anon = type { i32, i32 }
@s0 = global [8 x i8] c"AAAAAAA\00", align 4
@foo = global %struct.anon { i32 2, i32 3 }
@bar = global %struct.anon zeroinitializer
define i8* @A0() nounwind {
entry:
ret i8* getelementptr ([8 x i8]* @s0, i32 0, i32 0)
}
define i32 @A1() nounwind {
entry:
load i32* getelementptr (%struct.anon* @foo, i32 0, i32 0), align 8
load i32* getelementptr (%struct.anon* @foo, i32 0, i32 1), align 4
add i32 %1, %0
ret i32 %2
}