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llvm-mirror/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll
Jakob Stoklund Olesen f73b30b329 Simplify RegScavenger::forward a bit more.
Verify that early clobber registers and their aliases are not used.

All changes to RegsAvailable are now done as a transaction so the order of
operands makes no difference.

The included test case is from PR4686. It has behaviour that was dependent on the order of operands.

llvm-svn: 78465
2009-08-08 13:18:47 +00:00

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LLVM

; RUN: llvm-as < %s | llc -mtriple=armv7-eabi -mattr=+vfp2
; PR4686
@g_d = external global double ; <double*> [#uses=1]
define arm_aapcscc void @foo(float %yIncr) {
entry:
br i1 undef, label %bb, label %bb4
bb: ; preds = %entry
%0 = call arm_aapcs_vfpcc float @bar() ; <float> [#uses=1]
%1 = fpext float %0 to double ; <double> [#uses=1]
store double %1, double* @g_d, align 8
br label %bb4
bb4: ; preds = %bb, %entry
unreachable
}
declare arm_aapcs_vfpcc float @bar()