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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/lib/Target/Hexagon
Krzysztof Parzyszek 573d28992d [Hexagon] Convert stack object offsets to int64, NFC
This will print [SP-56] instead of [SP+4294967240].
2019-11-12 09:43:21 -06:00
..
AsmParser HexagonAsmParser::ParseDirectiveFalign - silence static analyzer dyn_cast<MCConstantExpr> null dereference warning. NFCI. 2019-09-26 10:35:19 +00:00
Disassembler
MCTargetDesc [Hexagon] getCompoundCandidateGroup - fix 'false' value is implicitly cast to unsigned warning. NFCI. 2019-11-05 21:37:53 +00:00
TargetInfo
BitTracker.cpp Use MCRegister in MCRegisterInfo's interfaces 2019-08-02 20:23:00 +00:00
BitTracker.h
CMakeLists.txt
Hexagon.h
Hexagon.td
HexagonAsmPrinter.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonAsmPrinter.h
HexagonBitSimplify.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonBitTracker.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp [Alignment][NFC] Remove unneeded llvm:: scoping on Align types 2019-09-27 12:54:21 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp
HexagonConstExtenders.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonConstPropagation.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonCopyToCombine.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonDepArch.h
HexagonDepArch.td
HexagonDepDecoders.inc
HexagonDepIICHVX.td
HexagonDepIICScalar.td
HexagonDepInstrFormats.td
HexagonDepInstrInfo.td
HexagonDepITypes.h
HexagonDepITypes.td
HexagonDepMapAsm2Intrin.td Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics" 2019-09-19 16:26:14 +00:00
HexagonDepMappings.td
HexagonDepOperands.td Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics" 2019-09-19 16:26:14 +00:00
HexagonDepTimingClasses.h
HexagonEarlyIfConv.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonExpandCondsets.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonFixupHwLoops.cpp [Alignment][NFC] Remove unneeded llvm:: scoping on Align types 2019-09-27 12:54:21 +00:00
HexagonFrameLowering.cpp [Hexagon] Convert stack object offsets to int64, NFC 2019-11-12 09:43:21 -06:00
HexagonFrameLowering.h Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
HexagonGenExtract.cpp [Hexagon] Improve generated code for test-if-bit-clear 2019-08-26 19:08:08 +00:00
HexagonGenInsert.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonGenMux.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonGenPredicate.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonHardwareLoops.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV5.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
HexagonInstrInfo.h Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
HexagonIntrinsics.td Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics" 2019-09-19 16:26:14 +00:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
HexagonISelDAGToDAG.cpp [Hexagon] Don't dereference dyn_cast<ConstantFPSDNode> result. NFCI. 2019-09-22 12:38:21 +00:00
HexagonISelDAGToDAG.h
HexagonISelDAGToDAGHVX.cpp
HexagonISelLowering.cpp [Hexagon] Handle remaining registers in getRegisterByName() 2019-10-29 08:56:01 -05:00
HexagonISelLowering.h TLI: Remove DAG argument from getRegisterByName 2019-10-01 01:44:39 +00:00
HexagonISelLoweringHVX.cpp [Hexagon] Generate vector min/max for HVX 2019-08-15 16:13:17 +00:00
HexagonLoopIdiomRecognition.cpp HexagonLoopIdiomRecognition - silence static analyzer dyn_cast<> null dereference warnings. NFCI. 2019-09-23 15:36:24 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonOperands.td
HexagonOptAddrMode.cpp Fix uninitialized variable warning. NFCI. 2019-09-23 21:32:38 +00:00
HexagonOptimizeSZextends.cpp
HexagonPatterns.td Fix pattern error for S2_tstbit_i instruction 2019-10-30 11:21:48 -05:00
HexagonPatternsHVX.td [Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX 2019-09-23 14:33:27 +00:00
HexagonPatternsV65.td
HexagonPeephole.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonPseudo.td
HexagonRDFOpt.cpp
HexagonRegisterInfo.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonSplitDouble.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonStoreWidening.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonSubtarget.cpp Use a bit of relaxed constexpr to make FeatureBitset costant intializable 2019-08-24 15:02:44 +00:00
HexagonSubtarget.h [SVE][MVT] Fixed-length vector MVT ranges 2019-09-17 10:19:23 +00:00
HexagonTargetMachine.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [Alignment][NFC] getMemoryOpCost uses MaybeAlign 2019-10-25 21:26:59 +02:00
HexagonTargetTransformInfo.h [Alignment][NFC] getMemoryOpCost uses MaybeAlign 2019-10-25 21:26:59 +02:00
HexagonVectorLoopCarriedReuse.cpp [Hexagon] Fix typo. NFC 2019-10-23 18:06:28 -07:00
HexagonVectorPrint.cpp
HexagonVExtract.cpp [Hexagon] Handle stack realignment in hexagon-vextract 2019-11-12 09:43:21 -06:00
HexagonVLIWPacketizer.cpp Prune two MachineInstr.h includes, fix up deps 2019-10-19 00:22:07 +00:00
HexagonVLIWPacketizer.h Prune two MachineInstr.h includes, fix up deps 2019-10-19 00:22:07 +00:00
LLVMBuild.txt
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp Prune two MachineInstr.h includes, fix up deps 2019-10-19 00:22:07 +00:00
RDFDeadCode.h
RDFGraph.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
RDFGraph.h
RDFLiveness.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
RDFLiveness.h
RDFRegisters.cpp
RDFRegisters.h