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5747eb82f8
The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes. 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights. 3. Use new interfaces in all other passes. 4. Remove old interfaces. This the second patch above. In this patch SelectionDAG starts to use probability-based interfaces in MBB to add successors but other MC passes are still using weight-based interfaces. Therefore, we need to maintain correct weight list in MBB even when probability-based interfaces are used. This is done by updating weight list in probability-based interfaces by treating the numerator of probabilities as weights. This change affects many test cases that check successor weight values. I will update those test cases once this patch looks good to you. Differential revision: http://reviews.llvm.org/D14361 llvm-svn: 253965
75 lines
2.2 KiB
LLVM
75 lines
2.2 KiB
LLVM
; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
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; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
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; Hexagon crashes (PR23377)
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; XFAIL: arm,aarch64,hexagon
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; Make sure we have the correct weight attached to each successor.
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define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
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; CHECK-LABEL: Machine code for function test2:
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entry:
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%conv = sext i32 %x to i64
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switch i64 %conv, label %return [
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i64 0, label %sw.bb
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i64 1, label %sw.bb
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i64 4, label %sw.bb
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i64 5, label %sw.bb1
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], !prof !0
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#2(1616928864) BB#4(530554784)
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; CHECK: BB#4: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1(252645135) BB#5(277909649)
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; CHECK: BB#5: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1(101058054) BB#3(176851595)
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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return:
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%retval.0 = phi i32 [ 5, %sw.bb1 ], [ 1, %sw.bb ], [ 0, %entry ]
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ret i32 %retval.0
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}
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!0 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 4, i32 64}
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declare void @g(i32)
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define void @left_leaning_weight_balanced_tree(i32 %x) {
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entry:
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switch i32 %x, label %return [
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i32 0, label %bb0
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i32 10, label %bb1
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i32 20, label %bb2
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i32 30, label %bb3
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i32 40, label %bb4
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i32 50, label %bb5
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], !prof !1
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bb0: tail call void @g(i32 0) br label %return
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bb1: tail call void @g(i32 1) br label %return
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bb2: tail call void @g(i32 2) br label %return
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bb3: tail call void @g(i32 3) br label %return
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bb4: tail call void @g(i32 4) br label %return
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bb5: tail call void @g(i32 5) br label %return
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return: ret void
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; Check that we set branch weights on the pivot cmp instruction correctly.
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; Cases {0,10,20,30} go on the left with weight 13; cases {40,50} go on the
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; right with weight 20.
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;
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; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree:
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK-NOT: Successors
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; CHECK: Successors according to CFG: BB#8(852677332) BB#9(1294806318)
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}
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!1 = !{!"branch_weights",
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; Default:
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i32 1,
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; Case 0, 10, 20:
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i32 10, i32 1, i32 1,
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; Case 30, 40, 50:
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i32 1, i32 10, i32 10}
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