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6bca5ce03f
This reverts commit r239380 due to apparently GDB regressions: http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/22562 llvm-svn: 239420
137 lines
5.2 KiB
C++
137 lines
5.2 KiB
C++
//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains support for writing dwarf compile unit.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class AsmPrinter;
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class ByteStreamer;
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class TargetRegisterInfo;
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class DwarfUnit;
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class DIELoc;
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/// Base class containing the logic for constructing DWARF expressions
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// entry.
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class DwarfExpression {
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protected:
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// Various convenience accessors that extract things out of AsmPrinter.
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const TargetRegisterInfo &TRI;
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unsigned DwarfVersion;
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public:
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DwarfExpression(const TargetRegisterInfo &TRI,
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unsigned DwarfVersion)
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: TRI(TRI), DwarfVersion(DwarfVersion) {}
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virtual ~DwarfExpression() {}
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/// Output a dwarf operand and an optional assembler comment.
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virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0;
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/// Emit a raw signed value.
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virtual void EmitSigned(int64_t Value) = 0;
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/// Emit a raw unsigned value.
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virtual void EmitUnsigned(uint64_t Value) = 0;
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/// Return whether the given machine register is the frame register in the
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/// current function.
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virtual bool isFrameRegister(unsigned MachineReg) = 0;
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/// Emit a dwarf register operation.
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void AddReg(int DwarfReg, const char *Comment = nullptr);
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/// Emit an (double-)indirect dwarf register operation.
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void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
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/// Emit a dwarf register operation for describing
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/// - a small value occupying only part of a register or
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/// - a register representing only part of a value.
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void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
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/// Emit a shift-right dwarf expression.
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void AddShr(unsigned ShiftBy);
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/// Emit an indirect dwarf register operation for the given machine register.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0);
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/// \brief Emit a partial DWARF register operation.
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/// \param MachineReg the register
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/// \param PieceSizeInBits size and
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/// \param PieceOffsetInBits offset of the piece in bits, if this is one
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/// piece of an aggregate value.
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///
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/// If size and offset is zero an operation for the entire
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/// register is emitted: Some targets do not provide a DWARF
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/// register number for every register. If this is the case, this
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/// function will attempt to emit a DWARF register by emitting a
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/// piece of a super-register or by piecing together multiple
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/// subregisters that alias the register.
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///
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
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unsigned PieceOffsetInBits = 0);
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/// Emit a signed constant.
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void AddSignedConstant(int Value);
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/// Emit an unsigned constant.
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void AddUnsignedConstant(unsigned Value);
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/// \brief Emit an entire expression on top of a machine register location.
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///
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// location, this is the offset of the piece inside the entire variable.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegExpression(const DIExpression *Expr, unsigned MachineReg,
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unsigned PieceOffsetInBits = 0);
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/// Emit a the operations remaining the DIExpressionIterator I.
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// location, this is the offset of the piece inside the entire variable.
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void AddExpression(DIExpression::expr_op_iterator I,
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DIExpression::expr_op_iterator E,
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unsigned PieceOffsetInBits = 0);
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};
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/// DwarfExpression implementation for .debug_loc entries.
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class DebugLocDwarfExpression : public DwarfExpression {
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ByteStreamer &BS;
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public:
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DebugLocDwarfExpression(const TargetRegisterInfo &TRI,
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unsigned DwarfVersion, ByteStreamer &BS)
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: DwarfExpression(TRI, DwarfVersion), BS(BS) {}
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitSigned(int64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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bool isFrameRegister(unsigned MachineReg) override;
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};
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/// DwarfExpression implementation for singular DW_AT_location.
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class DIEDwarfExpression : public DwarfExpression {
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const AsmPrinter ≈
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DwarfUnit &DU;
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DIELoc ¨
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public:
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DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitSigned(int64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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bool isFrameRegister(unsigned MachineReg) override;
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};
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}
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#endif
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