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Part 1 was submitted in http://reviews.llvm.org/D15134. Changes in this part: * X86RegisterInfo.td, X86RecognizableInstr.cpp: Add FR128 register class. * X86CallingConv.td: Pass f128 values in XMM registers or on stack. * X86InstrCompiler.td, X86InstrInfo.td, X86InstrSSE.td: Add instruction selection patterns for f128. * X86ISelLowering.cpp: When target has MMX registers, configure MVT::f128 in FR128RegClass, with TypeSoftenFloat action, and custom actions for some opcodes. Add missed cases of MVT::f128 in places that handle f32, f64, or vector types. Add TODO comment to support f128 type in inline assembly code. * SelectionDAGBuilder.cpp: Fix infinite loop when f128 type can have VT == TLI.getTypeToTransformTo(Ctx, VT). * Add unit tests for x86-64 fp128 type. Differential Revision: http://reviews.llvm.org/D11438 llvm-svn: 255558
108 lines
2.8 KiB
LLVM
108 lines
2.8 KiB
LLVM
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
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; Check all soft floating point library function calls.
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@vf64 = common global double 0.000000e+00, align 8
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@vf128 = common global fp128 0xL00000000000000000000000000000000, align 16
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define void @Test128Add(fp128 %d1, fp128 %d2) {
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entry:
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%add = fadd fp128 %d1, %d2
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store fp128 %add, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128Add:
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; CHECK: callq __addtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128_1Add(fp128 %d1){
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%add = fadd fp128 %0, %d1
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store fp128 %add, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128_1Add:
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; CHECK: movaps %xmm0, %xmm1
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; CHECK-NEXT: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __addtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128Sub(fp128 %d1, fp128 %d2){
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entry:
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%sub = fsub fp128 %d1, %d2
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store fp128 %sub, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128Sub:
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; CHECK: callq __subtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128_1Sub(fp128 %d1){
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%sub = fsub fp128 %0, %d1
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store fp128 %sub, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128_1Sub:
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; CHECK: movaps %xmm0, %xmm1
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; CHECK-NEXT: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __subtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128Mul(fp128 %d1, fp128 %d2){
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entry:
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%mul = fmul fp128 %d1, %d2
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store fp128 %mul, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128Mul:
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; CHECK: callq __multf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128_1Mul(fp128 %d1){
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%mul = fmul fp128 %0, %d1
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store fp128 %mul, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128_1Mul:
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; CHECK: movaps %xmm0, %xmm1
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; CHECK-NEXT: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __multf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128Div(fp128 %d1, fp128 %d2){
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entry:
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%div = fdiv fp128 %d1, %d2
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store fp128 %div, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128Div:
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; CHECK: callq __divtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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define void @Test128_1Div(fp128 %d1){
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%div = fdiv fp128 %0, %d1
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store fp128 %div, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: Test128_1Div:
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; CHECK: movaps %xmm0, %xmm1
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; CHECK-NEXT: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __divtf3
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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}
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