mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
ce9abb7e3a
Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
25 lines
1.3 KiB
ReStructuredText
25 lines
1.3 KiB
ReStructuredText
..
|
|
**************************************************
|
|
* *
|
|
* Automatically generated file, do not edit! *
|
|
* *
|
|
**************************************************
|
|
|
|
.. _amdgpu_synid7_addr_buf:
|
|
|
|
vaddr
|
|
===========================
|
|
|
|
This is an optional operand which may specify a 64-bit address, offset and/or index.
|
|
|
|
*Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`addr64<amdgpu_synid_addr64>`, :ref:`offen<amdgpu_synid_offen>` and :ref:`idxen<amdgpu_synid_idxen>`:
|
|
|
|
* If only :ref:`addr64<amdgpu_synid_addr64>` is specified, this operand supplies a 64-bit address. Size is 2 dwords.
|
|
* If only :ref:`idxen<amdgpu_synid_idxen>` is specified, this operand supplies an index. Size is 1 dword.
|
|
* If only :ref:`offen<amdgpu_synid_offen>` is specified, this operand supplies an offset. Size is 1 dword.
|
|
* If both :ref:`idxen<amdgpu_synid_idxen>` and :ref:`offen<amdgpu_synid_offen>` are specified, index is in the first register and offset is in the second. Size is 2 dwords.
|
|
* If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>`.
|
|
* All other combinations of these modifiers are illegal.
|
|
|
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`
|