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b035f9f3e4
This commit adds intrinsics and codegen support for the surface read/write and texture read instructions that take an explicit sampler parameter. Codegen operates on image handles at the PTX level, but falls back to direct replacement of handles with kernel arguments if image handles are not enabled. Note that image handles are explicitly disabled for all target architectures in this change (to be enabled later). llvm-svn: 205907
21 lines
724 B
LLVM
21 lines
724 B
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target triple = "nvptx-unknown-nvcl"
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declare i32 @llvm.nvvm.suld.1d.i32.trap(i64, i32)
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; CHECK: .entry foo
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define void @foo(i64 %img, float* %red, i32 %idx) {
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; CHECK: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [foo_param_0, {%r{{[0-9]+}}}]
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%val = tail call i32 @llvm.nvvm.suld.1d.i32.trap(i64 %img, i32 %idx)
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; CHECK: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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%ret = sitofp i32 %val to float
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; CHECK: st.f32 [%r{{[0-9]+}}], %f[[REDF]]
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store float %ret, float* %red
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ret void
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}
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!nvvm.annotations = !{!1, !2}
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!1 = metadata !{void (i64, float*, i32)* @foo, metadata !"kernel", i32 1}
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!2 = metadata !{void (i64, float*, i32)* @foo, metadata !"rdwrimage", i32 0}
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