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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
llvm-mirror/test/MC
Kit Barton 2e98937142 Add the following 64-bit vector integer arithmetic instructions added in POWER8:
vaddudm
vsubudm
vmulesw
vmulosw
vmuleuw
vmulouw
vmuluwm
vmaxsd
vmaxud
vminsd
vminud
vcmpequd
vcmpequd.
vcmpgtsd
vcmpgtsd.
vcmpgtud
vcmpgtud.
vrld
vsld
vsrd
vsrad

Phabricator review: http://reviews.llvm.org/D7959

llvm-svn: 231115
2015-03-03 19:55:45 +00:00
..
AArch64 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
ARM DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
AsmParser MC: Don't emit .no_dead_strip on targets which don't support it 2014-12-24 04:11:42 +00:00
COFF [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
Disassembler Add the following 64-bit vector integer arithmetic instructions added in POWER8: 2015-03-03 19:55:45 +00:00
ELF DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Hexagon [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 2014-12-09 18:16:49 +00:00
MachO [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
Markup MC: Simple example parser for MC assembly markup. 2012-10-31 23:24:13 +00:00
Mips [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
PowerPC Add the following 64-bit vector integer arithmetic instructions added in POWER8: 2015-03-03 19:55:45 +00:00
R600 R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Support all TLS access models - MC part 2015-02-18 09:11:36 +00:00
X86 DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00