Valery Pykhtin 3cb4209210 [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3) ...

Introduces DPP pseudo instructions and the pass that combines DPP mov with subsequent uses.

Differential revision: https://reviews.llvm.org/D53762

llvm-svn: 347993

2018-11-30 14:21:56 +00:00

..

AArch64

[AArch64] Support HiSilicon's TSV110 processor

2018-11-09 19:32:08 +00:00

AMDGPU

[AMDGPU] Combine DPP mov with use instructions (VOP1/2/3)

2018-11-30 14:21:56 +00:00

ARM

[llvm-readelf] Make llvm-readelf more compatible with GNU readelf.

2018-11-12 18:02:38 +00:00

AsmParser

[debuginfo] generate debug info with asm+.file

2018-08-28 16:23:39 +00:00

AVR

[AVR] Redefine the 'SBR' instruction as an alias

2018-09-01 12:22:54 +00:00

BPF

bpf: New disassembler testcases for 32-bit subregister support

2018-02-23 23:49:35 +00:00

COFF

[COFF] [X86] Don't use llvm_unreachable for unsupported relocation types

2018-10-04 20:43:38 +00:00

Disassembler

[MSP430] Add MC layer

2018-11-15 12:29:43 +00:00

ELF

Fix .cfi_restore with register numbers > 64

2018-11-13 10:54:49 +00:00

Hexagon

[MC] Fix 3 objdump tests after rL346610

2018-11-11 19:15:27 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

Produce an error on non-encodable offsets for darwin ARM scattered relocations.

2018-11-29 21:58:23 +00:00

Mips

Reland test/MC/Mips/reloc-directive-label-offset.s

2018-11-22 18:18:58 +00:00

MSP430

[MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup

2018-11-16 19:20:51 +00:00

PowerPC

[MC] Avoid inlining constant symbols with variants.

2018-09-17 20:34:26 +00:00

RISCV

[RISCV] Add additional CSR instruction aliases (imm. operands)

2018-11-30 14:10:52 +00:00

Sparc

[Sparc] Add unimp alias

2018-09-27 12:34:53 +00:00

SystemZ

[SystemZ] Implement SystemZOperand::print()

2018-10-26 00:36:00 +00:00

WebAssembly

[WebAssembly] replaced .param/.result by .functype

2018-11-19 17:10:36 +00:00

X86

[MC] Separate masm integer literal lexer support from inline asm

2018-10-24 20:23:57 +00:00