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6a984089f4
support for x86, and UMULO/SMULO for many architectures, including PPC (PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's not bad. llvm-svn: 73477
16 lines
501 B
LLVM
16 lines
501 B
LLVM
; RUN: llvm-as < %s | llc -march=cellspu
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declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
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define i1 @a(i16 %x) zeroext nounwind {
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%res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3)
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%obil = extractvalue {i16, i1} %res, 1
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ret i1 %obil
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}
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declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
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define i1 @b(i16 %x) zeroext nounwind {
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%res = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %x, i16 3)
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%obil = extractvalue {i16, i1} %res, 1
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ret i1 %obil
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}
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