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llvm-mirror/lib/Target/AMDGPU
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Sanjay Patel a84e4eb51a propagate fast-math-flags on DAG nodes 
After D10403, we had FMF in the DAG but disabled by default. Nick reported no crashing errors after some stress testing, 
so I enabled them at r243687. However, Escha soon notified us of a bug not covered by any in-tree regression tests: 
if we don't propagate the flags, we may fail to CSE DAG nodes because differing FMF causes them to not match. There is
one test case in this patch to prove that point.

This patch hopes to fix or leave a 'TODO' for all of the in-tree places where we create nodes that are FMF-capable. I 
did this by putting an assert in SelectionDAG.getNode() to find any FMF-capable node that was being created without FMF
( D11807 ). I then ran all regression tests and test-suite and confirmed that everything passes.

This patch exposes remaining work to get DAG FMF to be fully functional: (1) add the flags to non-binary nodes such as
FCMP, FMA and FNEG; (2) add the flags to intrinsics; (3) use the flags as conditions for transforms rather than the
current global settings.

Differential Revision: http://reviews.llvm.org/D12095

llvm-svn: 247815
2015-09-16 16:31:21 +00:00
..
AsmParser AMDGPU: Use StringRef value 2015-09-10 21:51:15 +00:00
InstPrinter
MCTargetDesc Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
TargetInfo
Utils AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
AMDGPU.h AMDGPU: Add pass to lower OpenCL image and sampler arguments. 2015-08-07 23:19:30 +00:00
AMDGPU.td AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Minor cleanups to always inline pass 2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp AMDGPU/SI: Fix printing useless info with amdhsa 2015-08-15 00:12:39 +00:00
AMDGPUAsmPrinter.h AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart() 2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AMDGPUFrameLowering.h Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AMDGPUInstrInfo.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AMDGPUInstrInfo.h MIR Serialization: Serialize the target index machine operands. 2015-07-28 23:02:45 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDGPU: Handle sub of constant for DS offset folding 2015-09-08 19:34:22 +00:00
AMDGPUISelLowering.cpp propagate fast-math-flags on DAG nodes 2015-09-16 16:31:21 +00:00
AMDGPUISelLowering.h AMDGPU: Produce error on dynamic_stackalloc 2015-08-26 18:37:13 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AMDGPUMCInstLower.cpp Remove and forbid raw_svector_ostream::flush() calls. 2015-08-13 18:12:56 +00:00
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp AMDGPU/SI: Another attempt to fix Windows bots broken by r244372 2015-08-08 01:11:07 +00:00
AMDGPUPromoteAlloca.cpp AMDGPU: Produce error on dynamic_stackalloc 2015-08-26 18:37:13 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td AMDGPU: Set SubRegIndex size and offset 2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
AMDGPUSubtarget.h AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets 2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges 2015-08-22 00:19:34 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h Make TargetTransformInfo keeping a reference to the Module DataLayout 2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp AMDGPU: Simplify debug printing 2015-09-10 21:51:19 +00:00
AMDKernelCodeT.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
CaymanInstructions.td
CIInstructions.td AMDGPU: Improve accuracy of instruction rates for some FP instructions 2015-08-22 00:50:41 +00:00
CMakeLists.txt AMDGPU: Add pass to lower OpenCL image and sampler arguments. 2015-08-07 23:19:30 +00:00
EvergreenInstructions.td
LLVMBuild.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Makefile AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Processors.td AMDGPU/SI: Add Fiji support 2015-08-06 19:43:02 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600InstrInfo.h Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600Instructions.td Fix typos. 2015-09-12 01:17:08 +00:00
R600Intrinsics.td
R600ISelLowering.cpp propagate fast-math-flags on DAG nodes 2015-09-16 16:31:21 +00:00
R600ISelLowering.h Make TargetLowering::getPointerTy() taking DataLayout as an argument 2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp [PM/AA] Remove all of the dead AliasAnalysis pointers being threaded 2015-07-22 09:52:54 +00:00
SIDefines.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp AMDGPU: Simplify debug printing 2015-09-10 21:51:19 +00:00
SIFixSGPRLiveRanges.cpp AMDGPU/SI: Report SIFixSGPRLiveRanges changed function 2015-08-26 19:12:03 +00:00
SIFoldOperands.cpp AMDGPU/SI: Fix creating v_mov_b32s without exec uses 2015-09-10 01:06:06 +00:00
SIInsertWaits.cpp AMDGPU/SI: Better handle s_wait insertion 2015-08-21 22:47:27 +00:00
SIInstrFormats.td AMDGPU/SI: Fix more cases of losing exec operands 2015-09-10 01:23:28 +00:00
SIInstrInfo.cpp AMDGPU/SI: Fix more cases of losing exec operands 2015-09-10 01:23:28 +00:00
SIInstrInfo.h AMDGPU: Delete dead code 2015-08-26 20:48:08 +00:00
SIInstrInfo.td AMDGPU: Remove unused multiclass argument 2015-09-09 17:03:18 +00:00
SIInstructions.td AMDGPU/SI: Fix more cases of losing exec operands 2015-09-10 01:23:28 +00:00
SIIntrinsics.td
SIISelLowering.cpp propagate fast-math-flags on DAG nodes 2015-09-16 16:31:21 +00:00
SIISelLowering.h AMDGPU: Assume SMRD access for constant address space 2015-08-07 20:18:34 +00:00
SILoadStoreOptimizer.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp AMDGPU/SI: Remove VCCReg 2015-08-08 00:41:48 +00:00
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
SIRegisterInfo.cpp AMDGPU: Set mem operands for spill instructions 2015-08-29 06:48:57 +00:00
SIRegisterInfo.h AMDGPU: Make sure to reserve super registers 2015-08-26 18:54:50 +00:00
SIRegisterInfo.td AMDGPU/SI: Fix input vcc operand for VOP2b instructions 2015-09-08 21:15:00 +00:00
SISchedule.td AMDGPU: Mark s_barrier as a high latency instruction 2015-09-08 19:54:32 +00:00
SIShrinkInstructions.cpp AMDGPU: Simplify debug printing 2015-09-10 21:51:19 +00:00
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops 2015-07-20 14:28:41 +00:00