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3420b345f9
Although targeting CoreCLR is similar to targeting MSVC, there are certain important differences that the backend must be aware of (e.g. differences in stack probes, EH, and library calls). Differential Revision: http://reviews.llvm.org/D11012 llvm-svn: 245115
60 lines
1.8 KiB
LLVM
60 lines
1.8 KiB
LLVM
; RUN: opt -S -winehprepare -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
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; RUN: opt -S -winehprepare -mtriple=x86_64-pc-windows-coreclr < %s | FileCheck %s
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target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
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@str.__except = internal unnamed_addr constant [9 x i8] c"__except\00", align 1
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; Function Attrs: uwtable
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declare i32 @puts(i8*)
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define void @may_crash() {
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entry:
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store volatile i32 42, i32* null, align 4
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ret void
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}
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declare i32 @__C_specific_handler(...)
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; Function Attrs: nounwind readnone
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declare i8* @llvm.frameaddress(i32)
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; Function Attrs: uwtable
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define void @seh_catch_all() personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
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entry:
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%exn.slot = alloca i8*
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%ehselector.slot = alloca i32
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invoke void @may_crash()
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to label %invoke.cont unwind label %lpad
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invoke.cont: ; preds = %entry
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br label %__try.cont
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lpad: ; preds = %entry
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%0 = landingpad { i8*, i32 }
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catch i8* null
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%1 = extractvalue { i8*, i32 } %0, 0
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store i8* %1, i8** %exn.slot
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%2 = extractvalue { i8*, i32 } %0, 1
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store i32 %2, i32* %ehselector.slot
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br label %__except
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__except: ; preds = %lpad
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%call = call i32 @puts(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @str.__except, i32 0, i32 0))
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br label %__try.cont
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__try.cont: ; preds = %__except, %invoke.cont
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ret void
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}
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; CHECK-LABEL: define void @seh_catch_all()
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; CHECK: landingpad
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; CHECK-NEXT: catch i8* null
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; CHECK-NEXT: call i8* (...) @llvm.eh.actions(i32 1, i8* null, i32 -1, i8* blockaddress(@seh_catch_all, %lpad.split))
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; CHECK-NEXT: indirectbr
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;
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; CHECK: lpad.split:
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; CHECK-NOT: extractvalue
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; CHECK: call i32 @puts
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