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llvm-mirror/test/CodeGen
History
QingShan Zhang 59f2af1a5f [NFC][Test][PowerPC] Add more tests for 'and mask'
2019-12-23 06:59:14 +00:00
..
AArch64
[AArch64] match splat of bitcasted extract subvector to DUPLANE
2019-12-22 08:37:03 -05:00
AMDGPU
[DAGCombiner] Check term use before applying aggressive FSUB optimisations
2019-12-23 09:37:58 +09:00
ARC
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ARM
Revert "[ARM] Improve codegen of volatile load/store of i64"
2019-12-20 18:08:24 +00:00
AVR
[AVR] Fix codegen for rotate instructions
2019-12-23 11:41:28 +08:00
BPF
[BPF] put not-section-attribute externs into BTF ".extern" data section
2019-12-10 11:45:17 -08:00
Generic
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Hexagon
[ModuloSchedule] Fix a bug in experimental expander
2019-11-23 16:01:47 -08:00
Inputs
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Lanai
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Mips
Mips: Make test resistant to future changes
2019-12-21 04:56:20 -05:00
MIR
[llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands.
2019-12-16 18:25:04 -05:00
MSP430
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NVPTX
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PowerPC
[NFC][Test][PowerPC] Add more tests for 'and mask'
2019-12-23 06:59:14 +00:00
RISCV
[RISCV] Enable the machine outliner for RISC-V
2019-12-19 16:41:53 +00:00
SPARC
Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so that
2019-12-03 11:21:52 +01:00
SystemZ
[SystemZ] Add a mapping from "select register" to "load on condition" (2-addr).
2019-12-20 10:44:58 -08:00
Thumb
Revert "ARM-Darwin: keep the frame register reserved even if not updated."
2019-12-06 10:59:26 -08:00
Thumb2
[ARM][MVE] Fixes for tail predication.
2019-12-20 09:34:18 +00:00
WebAssembly
[WebAssembly] Add avgr_u intrinsics and require nuw in patterns
2019-12-18 15:31:38 -08:00
WinCFGuard
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WinEH
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X86
[SelectionDAG] Copy FP flags when visiting a binary instruction.
2019-12-22 14:29:36 -05:00
XCore
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