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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
28 lines
727 B
LLVM
28 lines
727 B
LLVM
; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s
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; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s
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; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s
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; Verify that we emit the .insn directive for zero-sized (empty) basic blocks.
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; This only really matters for microMIPS and MIPS16.
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declare i32 @foo(...)
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declare void @bar()
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define void @main() personality i8* bitcast (i32 (...)* @foo to i8*) {
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entry:
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invoke void @bar() #0
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to label %unreachable unwind label %return
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unreachable:
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; CHECK: ${{.*}}: # %unreachable
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; CHECK-NEXT: .insn
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unreachable
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return:
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%0 = landingpad { i8*, i32 }
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catch i8* null
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ret void
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}
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attributes #0 = { noreturn }
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