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llvm-mirror/test/MC/ARM/speculation-barriers-errors.s
Oliver Stannard 62a89909f4 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB
This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52484

llvm-svn: 343300
2018-09-28 08:27:56 +00:00

35 lines
1.3 KiB
ArmAsm

// RUN: not llvm-mc -triple armv8a-none-eabi %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -triple thumbv8a-none-eabi %s 2>&1 | FileCheck %s -check-prefix=THUMB
it eq
csdbeq
it eq
ssbbeq
it eq
pssbbeq
it eq
hinteq #20
it eq
dsbeq #0
it eq
dsbeq #4
// CHECK: error: instruction 'csdb' is not predicable, but condition code specified
// CHECK: error: instruction 'ssbb' is not predicable, but condition code specified
// CHECK: error: instruction 'pssbb' is not predicable, but condition code specified
// CHECK: error: instruction 'csdb' is not predicable, but condition code specified
// CHECK: error: instruction 'dsb' is not predicable, but condition code specified
// CHECK: error: instruction 'dsb' is not predicable, but condition code specified
// THUMB: error: instruction 'csdb' is not predicable, but condition code specified
// THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
// THUMB: error: instruction 'pssbb' is not predicable, but condition code specified
// THUMB: error: instruction 'csdb' is not predicable, but condition code specified
// THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
// THUMB: error: instruction 'pssbb' is not predicable, but condition code specified