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81a9bfe915
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
41 lines
1.5 KiB
LLVM
41 lines
1.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.y() nounwind readnone
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; GCN-LABEL: {{^}}anyext_i1_i32:
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; GCN: v_cndmask_b32_e64
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define void @anyext_i1_i32(i32 addrspace(1)* %out, i32 %cond) {
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entry:
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%tmp = icmp eq i32 %cond, 0
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%tmp1 = zext i1 %tmp to i8
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%tmp2 = xor i8 %tmp1, -1
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%tmp3 = and i8 %tmp2, 1
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%tmp4 = zext i8 %tmp3 to i32
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store i32 %tmp4, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_anyext_i16_i32:
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]],
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; VI: v_xor_b32_e32 [[XOR:v[0-9]+]], -1, [[ADD]]
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; VI: v_and_b32_e32 [[AND:v[0-9]+]], 1, [[XOR]]
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; VI: buffer_store_dword [[AND]]
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define void @s_anyext_i16_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %a, i16 addrspace(1)* %b) {
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entry:
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%tid.x = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.y = call i32 @llvm.amdgcn.workitem.id.y()
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%a.ptr = getelementptr i16, i16 addrspace(1)* %a, i32 %tid.x
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%b.ptr = getelementptr i16, i16 addrspace(1)* %b, i32 %tid.y
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%a.l = load i16, i16 addrspace(1)* %a.ptr
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%b.l = load i16, i16 addrspace(1)* %b.ptr
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%tmp = add i16 %a.l, %b.l
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%tmp1 = trunc i16 %tmp to i8
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%tmp2 = xor i8 %tmp1, -1
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%tmp3 = and i8 %tmp2, 1
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%tmp4 = zext i8 %tmp3 to i32
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store i32 %tmp4, i32 addrspace(1)* %out
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ret void
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}
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