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81a9bfe915
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
112 lines
5.7 KiB
LLVM
112 lines
5.7 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-UNSAFE -check-prefix=SI-UNSAFE -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-UNSAFE -check-prefix=VI-UNSAFE -check-prefix=FUNC %s
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declare double @llvm.fabs.f64(double) #0
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declare double @llvm.floor.f64(double) #0
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; FUNC-LABEL: {{^}}fract_f64:
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; SI-DAG: v_fract_f64_e32 [[FRC:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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; SI-DAG: v_min_f64 v{{\[}}[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], v{{\[}}[[UPLO]]:[[UPHI]]], [[FRC]]
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; SI-DAG: v_cmp_class_f64_e64 vcc, v{{\[}}[[LO]]:[[HI]]], 3
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; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -v{{\[}}[[RESLO]]:[[RESHI]]{{\]}}
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; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
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; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; CI: v_floor_f64_e32 [[FLOORX:v\[[0-9]+:[0-9]+\]]], [[X]]
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; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]], -[[FLOORX]]
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; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; GCN-UNSAFE: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
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; GCN: buffer_store_dwordx2 [[FRACT]]
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define void @fract_f64(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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%x = load double, double addrspace(1)* %src
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%floor.x = call double @llvm.floor.f64(double %x)
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%fract = fsub double %x, %floor.x
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store double %fract, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fract_f64_neg:
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; SI-DAG: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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; SI-DAG: v_min_f64 v{{\[}}[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], v{{\[}}[[UPLO]]:[[UPHI]]], [[FRC]]
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; SI-DAG: v_cmp_class_f64_e64 vcc, v{{\[}}[[LO]]:[[HI]]], 3
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; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -v{{\[}}[[RESLO]]:[[RESHI]]{{\]}}
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; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
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; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; CI: v_floor_f64_e64 [[FLOORX:v\[[0-9]+:[0-9]+\]]], -[[X]]
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; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]], -[[FLOORX]]
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; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]]
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; GCN: buffer_store_dwordx2 [[FRACT]]
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define void @fract_f64_neg(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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%x = load double, double addrspace(1)* %src
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%neg.x = fsub double -0.0, %x
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%floor.neg.x = call double @llvm.floor.f64(double %neg.x)
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%fract = fsub double %neg.x, %floor.neg.x
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store double %fract, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fract_f64_neg_abs:
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; SI-DAG: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]|
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; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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; SI-DAG: v_min_f64 v{{\[}}[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], v{{\[}}[[UPLO]]:[[UPHI]]], [[FRC]]
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; SI-DAG: v_cmp_class_f64_e64 vcc, v{{\[}}[[LO]]:[[HI]]], 3
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; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO]]:[[HI]]{{\]}}|, -v{{\[}}[[RESLO]]:[[RESHI]]{{\]}}
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; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO]]:[[HI]]{{\]}}|, -[[SUB0]]
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; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; CI: v_floor_f64_e64 [[FLOORX:v\[[0-9]+:[0-9]+\]]], -|[[X]]|
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; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|, -[[FLOORX]]
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; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|
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; GCN: buffer_store_dwordx2 [[FRACT]]
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define void @fract_f64_neg_abs(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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%x = load double, double addrspace(1)* %src
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%abs.x = call double @llvm.fabs.f64(double %x)
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%neg.abs.x = fsub double -0.0, %abs.x
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%floor.neg.abs.x = call double @llvm.floor.f64(double %neg.abs.x)
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%fract = fsub double %neg.abs.x, %floor.neg.abs.x
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store double %fract, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}multi_use_floor_fract_f64:
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; VI-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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; VI-UNSAFE-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[X]]
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; VI-UNSAFE-DAG: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
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; VI-UNSAFE: buffer_store_dwordx2 [[FLOOR]]
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; VI-UNSAFE: buffer_store_dwordx2 [[FRACT]]
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define void @multi_use_floor_fract_f64(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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%x = load double, double addrspace(1)* %src
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%floor.x = call double @llvm.floor.f64(double %x)
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%fract = fsub double %x, %floor.x
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store volatile double %floor.x, double addrspace(1)* %out
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store volatile double %fract, double addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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