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cdae83c48c
Re-comitting with a change that avoids undefined uses getting put into the VRegUses list. The new algorithm remembers the uses encountered while walking backwards until a matching def is found. Contrary to the previous version this: - Works without LiveIntervals being available - Allows to increase the precision to subregisters/lanemasks (not used for now) The changes in the AMDGPU tests are necessary because the R600 scheduler is not stable with respect to the order of nodes in the ready queues. Differential Revision: http://reviews.llvm.org/D9068 llvm-svn: 254683
126 lines
3.6 KiB
LLVM
126 lines
3.6 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; These tests are for condition codes that are not supported by the hardware
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; CHECK-LABEL: {{^}}slt:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT_INT {{\** *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT: 5(7.006492e-45)
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define void @slt(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp slt i32 %in, 5
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ult_i32:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT_UINT {{\** *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT: 5(7.006492e-45)
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define void @ult_i32(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp ult i32 %in, 5
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ult_float:
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; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
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; CHECK-NEXT: 1084227584(5.000000e+00)
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; CHECK-NEXT: SETE T{{[0-9]\.[XYZW]}}, PV.[[CHAN]], 0.0
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; CHECK-NEXT: LSHR *
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define void @ult_float(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ult float %in, 5.0
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%1 = select i1 %0, float 1.0, float 0.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ult_float_native:
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; CHECK: LSHR
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; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @ult_float_native(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ult float %in, 5.0
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%1 = select i1 %0, float 0.0, float 1.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}olt:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @olt(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp olt float %in, 5.0
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%1 = select i1 %0, float 1.0, float 0.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}sle:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT_INT {{\** *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT: 6(8.407791e-45)
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define void @sle(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp sle i32 %in, 5
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ule_i32:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT_UINT {{\** *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT: 6(8.407791e-45)
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define void @ule_i32(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp ule i32 %in, 5
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ule_float:
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; CHECK: SETGT * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
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; CHECK-NEXT: 1084227584(5.000000e+00)
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; CHECK-NEXT: SETE T{{[0-9]\.[XYZW]}}, PV.[[CHAN]], 0.0
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; CHECK-NEXT: LSHR *
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define void @ule_float(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ule float %in, 5.0
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%1 = select i1 %0, float 1.0, float 0.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ule_float_native:
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; CHECK: LSHR
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; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @ule_float_native(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ule float %in, 5.0
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%1 = select i1 %0, float 0.0, float 1.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}ole:
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; CHECK: LSHR
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; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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; CHECK-NEXT:1084227584(5.000000e+00)
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define void @ole(float addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ole float %in, 5.0
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%1 = select i1 %0, float 1.0, float 0.0
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store float %1, float addrspace(1)* %out
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ret void
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}
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