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33 lines
1.2 KiB
ArmAsm
33 lines
1.2 KiB
ArmAsm
// FIXME: Switch back to FileCheck once we print actual instructions
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// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
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// RUN: grep {MCInst(opcode=.*, operands=.reg:2, reg:0, reg:2.)} %t
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subb %al, %al
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:24.)} %t
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addl $24, %eax
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// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:1, reg:0, val:10, reg:0, reg:19.)} %t
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movl %eax, 10(%ebp)
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// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:1, reg:21, val:10, reg:0, reg:19.)} %t
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movl %eax, 10(%ebp, %ebx)
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// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:4, reg:21, val:10, reg:0, reg:19.)} %t
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movl %eax, 10(%ebp, %ebx, 4)
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// RUN: grep {MCInst(opcode=.*, operands=.reg:0, imm:4, reg:21, val:10, reg:0, reg:19.)} %t
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movl %eax, 10(, %ebx, 4)
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// FIXME: Check that this matches SUB32ri8
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:1.)} %t
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subl $1, %eax
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// FIXME: Check that this matches SUB32ri8
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:-1.)} %t
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subl $-1, %eax
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// FIXME: Check that this matches SUB32ri
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
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subl $256, %eax
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