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a492dddf2e
LLVM selection dag assumes "switch" indices are pointer sized, which causes problems for our 32-bit br_table. The new function ensures 32-bit operands don't get unnecessarily extended, and 64-bit operands get truncated. Note that the changes to the existing test test exactly that: the addition of -NEXT in 2 places ensures no extension is inserted (which the test previously ignored) and that the wrap is present (previously omitted in wasm64 mode). Differential Revision: https://reviews.llvm.org/D84705
217 lines
6.3 KiB
LLVM
217 lines
6.3 KiB
LLVM
; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs | FileCheck %s
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; Test switch instructions. Block placement is disabled because it reorders
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; the blocks in a way that isn't interesting here.
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declare void @foo0()
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declare void @foo1()
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declare void @foo2()
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declare void @foo3()
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declare void @foo4()
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declare void @foo5()
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; CHECK-LABEL: bar32:
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK-NEXT: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 6{{$}}
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; CHECK: .LBB{{[0-9]+}}_1:
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; CHECK: call foo0{{$}}
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK: call foo1{{$}}
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; CHECK: .LBB{{[0-9]+}}_3:
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; CHECK: call foo2{{$}}
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; CHECK: .LBB{{[0-9]+}}_4:
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; CHECK: call foo3{{$}}
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; CHECK: .LBB{{[0-9]+}}_5:
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; CHECK: call foo4{{$}}
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; CHECK: .LBB{{[0-9]+}}_6:
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; CHECK: call foo5{{$}}
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; CHECK: .LBB{{[0-9]+}}_7:
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; CHECK: return{{$}}
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define void @bar32(i32 %n) {
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entry:
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switch i32 %n, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb
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i32 2, label %sw.bb
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i32 3, label %sw.bb
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i32 4, label %sw.bb
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i32 5, label %sw.bb
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i32 6, label %sw.bb
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i32 7, label %sw.bb.1
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i32 8, label %sw.bb.1
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i32 9, label %sw.bb.1
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i32 10, label %sw.bb.1
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i32 11, label %sw.bb.1
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i32 12, label %sw.bb.1
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i32 13, label %sw.bb.1
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i32 14, label %sw.bb.1
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i32 15, label %sw.bb.2
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i32 16, label %sw.bb.2
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i32 17, label %sw.bb.2
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i32 18, label %sw.bb.2
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i32 19, label %sw.bb.2
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i32 20, label %sw.bb.2
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i32 21, label %sw.bb.3
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i32 22, label %sw.bb.4
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i32 23, label %sw.bb.5
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]
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sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo0()
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br label %sw.epilog
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sw.bb.1: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo1()
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br label %sw.epilog
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sw.bb.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo2()
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br label %sw.epilog
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sw.bb.3: ; preds = %entry
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tail call void @foo3()
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br label %sw.epilog
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sw.bb.4: ; preds = %entry
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tail call void @foo4()
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br label %sw.epilog
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sw.bb.5: ; preds = %entry
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tail call void @foo5()
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
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ret void
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}
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; CHECK-LABEL: bar64:
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; CHECK: block {{$}}
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; CHECK: i64.const
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; CHECK: i64.gt_u
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; CHECK: br_if 0
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: block {{$}}
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; CHECK: i32.wrap_i64
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; CHECK-NEXT: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK: call foo0{{$}}
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; CHECK: .LBB{{[0-9]+}}_3:
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; CHECK: call foo1{{$}}
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; CHECK: .LBB{{[0-9]+}}_4:
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; CHECK: call foo2{{$}}
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; CHECK: .LBB{{[0-9]+}}_5:
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; CHECK: call foo3{{$}}
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; CHECK: .LBB{{[0-9]+}}_6:
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; CHECK: call foo4{{$}}
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; CHECK: .LBB{{[0-9]+}}_7:
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; CHECK: call foo5{{$}}
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; CHECK: .LBB{{[0-9]+}}_8:
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; CHECK: return{{$}}
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define void @bar64(i64 %n) {
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entry:
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switch i64 %n, label %sw.epilog [
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i64 0, label %sw.bb
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i64 1, label %sw.bb
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i64 2, label %sw.bb
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i64 3, label %sw.bb
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i64 4, label %sw.bb
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i64 5, label %sw.bb
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i64 6, label %sw.bb
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i64 7, label %sw.bb.1
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i64 8, label %sw.bb.1
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i64 9, label %sw.bb.1
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i64 10, label %sw.bb.1
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i64 11, label %sw.bb.1
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i64 12, label %sw.bb.1
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i64 13, label %sw.bb.1
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i64 14, label %sw.bb.1
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i64 15, label %sw.bb.2
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i64 16, label %sw.bb.2
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i64 17, label %sw.bb.2
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i64 18, label %sw.bb.2
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i64 19, label %sw.bb.2
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i64 20, label %sw.bb.2
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i64 21, label %sw.bb.3
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i64 22, label %sw.bb.4
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i64 23, label %sw.bb.5
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]
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sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo0()
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br label %sw.epilog
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sw.bb.1: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo1()
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br label %sw.epilog
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sw.bb.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry
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tail call void @foo2()
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br label %sw.epilog
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sw.bb.3: ; preds = %entry
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tail call void @foo3()
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br label %sw.epilog
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sw.bb.4: ; preds = %entry
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tail call void @foo4()
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br label %sw.epilog
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sw.bb.5: ; preds = %entry
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tail call void @foo5()
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
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ret void
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}
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; CHECK-LABEL: truncated:
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; CHECK: block
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; CHECK: block
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; CHECK: block
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; CHECK: i32.wrap_i64
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; CHECK-NEXT: br_table {{[^,]+}}, 0, 1, 2{{$}}
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; CHECK: .LBB{{[0-9]+}}_1
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; CHECK: end_block
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; CHECK: call foo0{{$}}
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; CHECK: return{{$}}
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; CHECK: .LBB{{[0-9]+}}_2
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; CHECK: end_block
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; CHECK: call foo1{{$}}
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; CHECK: return{{$}}
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; CHECK: .LBB{{[0-9]+}}_3
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; CHECK: end_block
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; CHECK: call foo2{{$}}
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; CHECK: return{{$}}
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; CHECK: end_function
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define void @truncated(i64 %n) {
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entry:
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%m = trunc i64 %n to i32
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switch i32 %m, label %default [
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i32 0, label %bb1
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i32 1, label %bb2
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]
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bb1:
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tail call void @foo0()
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ret void
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bb2:
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tail call void @foo1()
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ret void
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default:
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tail call void @foo2()
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ret void
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}
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