1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
llvm-mirror/test/CodeGen/Mips/zeroreg.ll
Akira Hatanaka 431ee824c6 Make the following changes in MipsAsmPrinter.cpp:
- Remove code which lowers pseudo SETGP01.
- Fix LowerSETGP01. The first two of the three instructions that are emitted to
  initialize the global pointer register now use register $2.
- Stop emitting .cpload directive.

llvm-svn: 156689
2012-05-12 00:48:43 +00:00

26 lines
672 B
LLVM

; RUN: llc < %s -march=mipsel | FileCheck %s
@g1 = external global i32
define i32 @foo0(i32 %s) nounwind readonly {
entry:
; CHECK: movn ${{[0-9]+}}, $zero
%tobool = icmp ne i32 %s, 0
%0 = load i32* @g1, align 4, !tbaa !0
%cond = select i1 %tobool, i32 0, i32 %0
ret i32 %cond
}
define i32 @foo1(i32 %s) nounwind readonly {
entry:
; CHECK: movz ${{[0-9]+}}, $zero
%tobool = icmp ne i32 %s, 0
%0 = load i32* @g1, align 4, !tbaa !0
%cond = select i1 %tobool, i32 %0, i32 0
ret i32 %cond
}
!0 = metadata !{metadata !"int", metadata !1}
!1 = metadata !{metadata !"omnipotent char", metadata !2}
!2 = metadata !{metadata !"Simple C/C++ TBAA", null}