Daniel Sanders dc654abb9f [mips] Add tests for the 'ret', 'call', and 'indirectbr' LLVM IR instruction. ... Summary: The tests in this directory are intended to test a single IR instruction with as few dependencies on other instructions as possible. The aim is to be very confident that each LLVM-IR instruction is implemented correctly and with the optimal sequence of instructions, as well as to make it easy to tell what is tested, and make it easier to bring up new ISA revisions in the future. This gives us a good foundation on which to test bigger things. These particular tests will allow testing that MIPS32r6/MIPS64r6 generate the correct return instruction for returns, calls, and indirect branches. This will be a bit tricky since the assembly text is identical but the instruction is actually different. On MIPS32r6/MIPS64r6 'jr $rs' has been removed in favour of the equivalent 'jalr $zero, $rs'. 'jr $rs' remains as an alias for 'jalr $zero, $rs'. Differential Revision: http://reviews.llvm.org/D4266 llvm-svn: 212345		2014-07-04 15:16:14 +00:00
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AArch64	[aarch64] Add a test that should have been in r212242 but I forgot to	2014-07-03 02:12:26 +00:00
ARM	[ARM] Implement ISB memory barrier intrinsic	2014-07-03 16:00:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Add tests for the 'ret', 'call', and 'indirectbr' LLVM IR instruction.	2014-07-04 15:16:14 +00:00
MSP430
NVPTX	[NVPTX] Add reflect intrinsic (better than matching by function name)	2014-06-27 18:36:11 +00:00
PowerPC	llvm-readobj: fix MachO relocatoin printing a bit.	2014-07-04 10:57:56 +00:00
R600	R600: Promote i64 loads to v2i32	2014-07-02 20:53:54 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	llvm/test/CodeGen/X86/vector-gep.ll: Appease to add -mtriple=i686-linux.	2014-07-04 11:55:40 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00