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1dcd9f1f31
This patch add the ISD::LRINT and ISD::LLRINT along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lrint/llrint generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D62017 llvm-svn: 361875
33 lines
992 B
LLVM
33 lines
992 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
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; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE2
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define i32 @testmsws_builtin(float %x) {
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; CHECK-LABEL: testmsws_builtin:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: jmp lrintf # TAILCALL
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;
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; SSE2-LABEL: testmsws_builtin:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: jmp lrintf # TAILCALL
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
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ret i32 %0
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}
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define i32 @testmswd_builtin(double %x) {
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; CHECK-LABEL: testmswd_builtin:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: jmp lrint # TAILCALL
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;
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; SSE2-LABEL: testmswd_builtin:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: jmp lrint # TAILCALL
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
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ret i32 %0
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}
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declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
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declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
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