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bbc71b8057
Tests updated to explicitly use fast-isel at -O0 instead of implicitly. This change also allows an explicit -fast-isel option to override an implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0. Differential Revision: https://reviews.llvm.org/D41362 llvm-svn: 321655
245 lines
6.9 KiB
LLVM
245 lines
6.9 KiB
LLVM
; RUN: llc -mtriple=aarch64-- -O0 -fast-isel -fast-isel-abort=4 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-- -O0 -fast-isel=0 -global-isel=false -verify-machineinstrs < %s | FileCheck %s
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; Note that checking SelectionDAG output isn't strictly necessary, but they
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; currently match, so we might as well check both! Feel free to remove SDAG.
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; CHECK-LABEL: atomic_store_monotonic_8:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: strb w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_8(i8* %p, i8 %val) #0 {
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store atomic i8 %val, i8* %p monotonic, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_8_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: strb w1, [x0, #1]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_8_off(i8* %p, i8 %val) #0 {
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%tmp0 = getelementptr i8, i8* %p, i32 1
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store atomic i8 %val, i8* %tmp0 monotonic, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_16:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: strh w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_16(i16* %p, i16 %val) #0 {
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store atomic i16 %val, i16* %p monotonic, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_16_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: strh w1, [x0, #2]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_16_off(i16* %p, i16 %val) #0 {
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%tmp0 = getelementptr i16, i16* %p, i32 1
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store atomic i16 %val, i16* %tmp0 monotonic, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_32:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: str w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_32(i32* %p, i32 %val) #0 {
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store atomic i32 %val, i32* %p monotonic, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_32_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: str w1, [x0, #4]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_32_off(i32* %p, i32 %val) #0 {
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%tmp0 = getelementptr i32, i32* %p, i32 1
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store atomic i32 %val, i32* %tmp0 monotonic, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_64:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: str x1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_64(i64* %p, i64 %val) #0 {
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store atomic i64 %val, i64* %p monotonic, align 8
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ret void
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}
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; CHECK-LABEL: atomic_store_monotonic_64_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: str x1, [x0, #8]
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; CHECK-NEXT: ret
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define void @atomic_store_monotonic_64_off(i64* %p, i64 %val) #0 {
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%tmp0 = getelementptr i64, i64* %p, i32 1
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store atomic i64 %val, i64* %tmp0 monotonic, align 8
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ret void
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}
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; CHECK-LABEL: atomic_store_release_8:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlrb w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_8(i8* %p, i8 %val) #0 {
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store atomic i8 %val, i8* %p release, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_release_8_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #1
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; CHECK-NEXT: stlrb w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_8_off(i8* %p, i8 %val) #0 {
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%tmp0 = getelementptr i8, i8* %p, i32 1
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store atomic i8 %val, i8* %tmp0 release, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_release_16:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlrh w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_16(i16* %p, i16 %val) #0 {
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store atomic i16 %val, i16* %p release, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_release_16_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #2
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; CHECK-NEXT: stlrh w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_16_off(i16* %p, i16 %val) #0 {
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%tmp0 = getelementptr i16, i16* %p, i32 1
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store atomic i16 %val, i16* %tmp0 release, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_release_32:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlr w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_32(i32* %p, i32 %val) #0 {
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store atomic i32 %val, i32* %p release, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_release_32_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #4
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; CHECK-NEXT: stlr w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_32_off(i32* %p, i32 %val) #0 {
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%tmp0 = getelementptr i32, i32* %p, i32 1
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store atomic i32 %val, i32* %tmp0 release, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_release_64:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlr x1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_64(i64* %p, i64 %val) #0 {
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store atomic i64 %val, i64* %p release, align 8
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ret void
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}
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; CHECK-LABEL: atomic_store_release_64_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #8
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; CHECK-NEXT: stlr x1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_release_64_off(i64* %p, i64 %val) #0 {
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%tmp0 = getelementptr i64, i64* %p, i32 1
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store atomic i64 %val, i64* %tmp0 release, align 8
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_8:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlrb w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_8(i8* %p, i8 %val) #0 {
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store atomic i8 %val, i8* %p seq_cst, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_8_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #1
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; CHECK-NEXT: stlrb w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_8_off(i8* %p, i8 %val) #0 {
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%tmp0 = getelementptr i8, i8* %p, i32 1
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store atomic i8 %val, i8* %tmp0 seq_cst, align 1
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_16:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlrh w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_16(i16* %p, i16 %val) #0 {
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store atomic i16 %val, i16* %p seq_cst, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_16_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #2
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; CHECK-NEXT: stlrh w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_16_off(i16* %p, i16 %val) #0 {
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%tmp0 = getelementptr i16, i16* %p, i32 1
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store atomic i16 %val, i16* %tmp0 seq_cst, align 2
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_32:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlr w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_32(i32* %p, i32 %val) #0 {
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store atomic i32 %val, i32* %p seq_cst, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_32_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #4
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; CHECK-NEXT: stlr w1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_32_off(i32* %p, i32 %val) #0 {
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%tmp0 = getelementptr i32, i32* %p, i32 1
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store atomic i32 %val, i32* %tmp0 seq_cst, align 4
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_64:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stlr x1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_64(i64* %p, i64 %val) #0 {
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store atomic i64 %val, i64* %p seq_cst, align 8
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ret void
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}
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; CHECK-LABEL: atomic_store_seq_cst_64_off:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: add x0, x0, #8
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; CHECK-NEXT: stlr x1, [x0]
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; CHECK-NEXT: ret
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define void @atomic_store_seq_cst_64_off(i64* %p, i64 %val) #0 {
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%tmp0 = getelementptr i64, i64* %p, i32 1
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store atomic i64 %val, i64* %tmp0 seq_cst, align 8
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ret void
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}
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attributes #0 = { nounwind }
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