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bdc6e663e7
This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 llvm-svn: 296807
46 lines
900 B
LLVM
46 lines
900 B
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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define i16 @mov(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: mov:
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; CHECK: mov.w r13, r12
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ret i16 %b
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}
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define i16 @add(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: add:
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; CHECK: add.w r13, r12
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%1 = add i16 %a, %b
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ret i16 %1
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}
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define i16 @and(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: and:
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; CHECK: and.w r13, r12
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%1 = and i16 %a, %b
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ret i16 %1
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}
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define i16 @bis(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: bis:
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; CHECK: bis.w r13, r12
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%1 = or i16 %a, %b
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ret i16 %1
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}
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define i16 @bic(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: bic:
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; CHECK: bic.w r13, r12
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%1 = xor i16 %b, -1
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%2 = and i16 %a, %1
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ret i16 %2
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}
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define i16 @xor(i16 %a, i16 %b) nounwind {
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; CHECK-LABEL: xor:
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; CHECK: xor.w r13, r12
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%1 = xor i16 %a, %b
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ret i16 %1
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}
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