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llvm-mirror/test/CodeGen/X86/sse-align-4.ll
Dan Gohman 2fc9d5171e Implement initial memory alignment awareness for SSE instructions. Vector loads
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.

llvm-svn: 40015
2007-07-18 20:23:34 +00:00

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303 B
LLVM

; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | wc -l | grep 2
define void @foo(<4 x float>* %p, <4 x float> %x)
{
store <4 x float> %x, <4 x float>* %p, align 4
ret void
}
define void @bar(<2 x double>* %p, <2 x double> %x)
{
store <2 x double> %x, <2 x double>* %p, align 8
ret void
}