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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
30 lines
864 B
LLVM
30 lines
864 B
LLVM
; RUN: llc -march=arm64 -mcpu=cyclone < %s | FileCheck %s
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; CHECK: foo
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; CHECK: ldr w[[REG:[0-9]+]], [x19, #264]
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; CHECK: str w[[REG]], [x19, #132]
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; CHECK: ldr w{{[0-9]+}}, [x19, #264]
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define i32 @foo(i32 %a) nounwind {
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%retval = alloca i32, align 4
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%a.addr = alloca i32, align 4
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%arr = alloca [32 x i32], align 4
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%i = alloca i32, align 4
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%arr2 = alloca [32 x i32], align 4
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%j = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32* %a.addr, align 4
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%tmp1 = zext i32 %tmp to i64
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%v = mul i64 4, %tmp1
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%vla = alloca i8, i64 %v, align 4
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%tmp2 = bitcast i8* %vla to i32*
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%tmp3 = load i32* %a.addr, align 4
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store i32 %tmp3, i32* %i, align 4
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%tmp4 = load i32* %a.addr, align 4
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store i32 %tmp4, i32* %j, align 4
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%tmp5 = load i32* %j, align 4
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store i32 %tmp5, i32* %retval
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%x = load i32* %retval
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ret i32 %x
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}
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