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llvm-mirror/test/CodeGen/ARM/2012-10-18-PR14099-ByvalFrameAddress.ll
Kristof Beyls 7d64810efd [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
The benchmarking summarized in
http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed
this is beneficial for a wide range of cores.

As is to be expected, quite a few small adaptations are needed to the
regressions tests, as the difference in scheduling results in:
- Quite a few small instruction schedule differences.
- A few changes in register allocation decisions caused by different
 instruction schedules.
- A few changes in IfConversion decisions, due to a difference in
 instruction schedule and/or the estimated cost of a branch mispredict.

llvm-svn: 306514
2017-06-28 07:07:03 +00:00

31 lines
740 B
LLVM

; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s
%struct.s = type { [4 x i32] }
@v = constant %struct.s zeroinitializer;
declare void @f(%struct.s* %p);
; CHECK-LABEL: t:
define void @t(i32 %a, %struct.s* byval %s) nounwind {
entry:
; Here we need to only check proper start address of restored %s argument.
; CHECK: sub sp, sp, #12
; CHECK: push {r11, lr}
; CHECK: sub sp, sp, #4
; CHECK: add r0, sp, #12
; CHECK: stm r0, {r1, r2, r3}
; CHECK: add r0, sp, #12
; CHECK-NEXT: bl f
call void @f(%struct.s* %s)
ret void
}
; CHECK-LABEL: caller:
define void @caller() {
; CHECK: ldm r{{[0-9]+}}, {r1, r2, r3}
call void @t(i32 0, %struct.s* @v);
ret void
}