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llvm-mirror/lib/MCA
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Andrea Di Biagio c31b5f70ca [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. 
Conservatively use the instruction latency to compute the last write-back cycle.
Before this patch, the last write cycle computation was incorrect for store
instructions that didn't declare any register writes.
2021-05-26 14:17:43 +01:00
..
HardwareUnits [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. 2021-05-08 18:10:35 +01:00
Stages [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. 2021-05-26 14:17:43 +01:00
CMakeLists.txt [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
CodeEmitter.cpp
Context.cpp [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
HWEventListener.cpp
InstrBuilder.cpp [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
Instruction.cpp [MCA] Improved handling of negative read-advance cycles. 2021-03-23 14:47:23 +00:00
Pipeline.cpp
Support.cpp