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llvm-mirror/test/MC/Mips/mips64r3
Simon Dardis 0fc0478ed5 [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases
Add the instruction alias sgtu (register form only), two operand forms of
s[rl]l and sra, and missing single/two operand forms of dnegu/neg.

Reviewers: dsanders

Differential Revision: https://reviews.llvm.org/D22752

llvm-svn: 276736
2016-07-26 09:13:46 +00:00
..
abi-bad.s
abiflags.s
invalid.s [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions 2016-06-27 08:23:28 +00:00
valid-xfail.s
valid.s [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases 2016-07-26 09:13:46 +00:00