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04fad6dc3c
Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
76 lines
2.1 KiB
LLVM
76 lines
2.1 KiB
LLVM
; RUN: llc -no-integrated-as -march=mipsel < %s | \
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; RUN: FileCheck %s -check-prefix=ALL -check-prefix=GAS
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; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=ALL -check-prefix=IAS
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define void @constraint_I() nounwind {
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; First I with short
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; ALL-LABEL: constraint_I:
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 4096
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; ALL: #NO_APP
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tail call i16 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i16 7, i16 4096) nounwind
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; Then I with int
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i32 7, i32 -3) nounwind
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ret void
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}
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define void @constraint_J() nounwind {
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; Now J with 0
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; ALL-LABEL: constraint_J:
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
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ret void
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}
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define void @constraint_K() nounwind {
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; Now K with 64
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; ALL: #APP
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; GAS: addu ${{[0-9]+}}, ${{[0-9]+}}, 64
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; IAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 64
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; ALL: #NO_APP
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tail call i16 asm sideeffect "addu $0, $1, $2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
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ret void
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}
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define void @constraint_L() nounwind {
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; Now L with 0x00100000
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; ALL: #APP
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; ALL: add ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; ALL: #NO_APP
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tail call i32 asm sideeffect "add $0, $1, $3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
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ret void
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}
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define void @constraint_N() nounwind {
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; Now N with -3
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,N"(i32 7, i32 -3) nounwind
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ret void
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}
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define void @constraint_O() nounwind {
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; Now O with -3
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; ALL: #APP
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; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,O"(i32 7, i16 -3) nounwind
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ret void
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}
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define void @constraint_P() nounwind {
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; Now P with 65535
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; ALL: #APP
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; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 65535
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; ALL: #NO_APP
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tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,P"(i32 7, i32 65535) nounwind
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ret void
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}
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