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123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
#ifndef CL_COMMON_DEFINES_H
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#define CL_COMMON_DEFINES_H
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// This file includes defines that are common to both kernel code and
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// the NVPTX back-end.
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//
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// Common defines for Image intrinsics
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// Channel order
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enum {
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CLK_R = 0x10B0,
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CLK_A = 0x10B1,
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CLK_RG = 0x10B2,
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CLK_RA = 0x10B3,
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CLK_RGB = 0x10B4,
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CLK_RGBA = 0x10B5,
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CLK_BGRA = 0x10B6,
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CLK_ARGB = 0x10B7,
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#if (__NV_CL_C_VERSION == __NV_CL_C_VERSION_1_0)
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CLK_xRGB = 0x10B7,
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#endif
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CLK_INTENSITY = 0x10B8,
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CLK_LUMINANCE = 0x10B9
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#if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
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,
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CLK_Rx = 0x10BA,
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CLK_RGx = 0x10BB,
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CLK_RGBx = 0x10BC
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#endif
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};
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typedef enum clk_channel_type {
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// valid formats for float return types
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CLK_SNORM_INT8 = 0x10D0, // four channel RGBA unorm8
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CLK_SNORM_INT16 = 0x10D1, // four channel RGBA unorm16
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CLK_UNORM_INT8 = 0x10D2, // four channel RGBA unorm8
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CLK_UNORM_INT16 = 0x10D3, // four channel RGBA unorm16
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CLK_HALF_FLOAT = 0x10DD, // four channel RGBA half
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CLK_FLOAT = 0x10DE, // four channel RGBA float
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#if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
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CLK_UNORM_SHORT_565 = 0x10D4,
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CLK_UNORM_SHORT_555 = 0x10D5,
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CLK_UNORM_INT_101010 = 0x10D6,
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#endif
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// valid only for integer return types
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CLK_SIGNED_INT8 = 0x10D7,
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CLK_SIGNED_INT16 = 0x10D8,
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CLK_SIGNED_INT32 = 0x10D9,
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CLK_UNSIGNED_INT8 = 0x10DA,
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CLK_UNSIGNED_INT16 = 0x10DB,
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CLK_UNSIGNED_INT32 = 0x10DC,
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// CI SPI for CPU
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__CLK_UNORM_INT8888, // four channel ARGB unorm8
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__CLK_UNORM_INT8888R, // four channel BGRA unorm8
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__CLK_VALID_IMAGE_TYPE_COUNT,
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__CLK_INVALID_IMAGE_TYPE = __CLK_VALID_IMAGE_TYPE_COUNT,
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__CLK_VALID_IMAGE_TYPE_MASK_BITS = 4, // number of bits required to
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// represent any image type
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__CLK_VALID_IMAGE_TYPE_MASK = (1 << __CLK_VALID_IMAGE_TYPE_MASK_BITS) - 1
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} clk_channel_type;
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typedef enum clk_sampler_type {
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__CLK_ADDRESS_BASE = 0,
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CLK_ADDRESS_NONE = 0 << __CLK_ADDRESS_BASE,
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CLK_ADDRESS_CLAMP = 1 << __CLK_ADDRESS_BASE,
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CLK_ADDRESS_CLAMP_TO_EDGE = 2 << __CLK_ADDRESS_BASE,
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CLK_ADDRESS_REPEAT = 3 << __CLK_ADDRESS_BASE,
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CLK_ADDRESS_MIRROR = 4 << __CLK_ADDRESS_BASE,
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#if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
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CLK_ADDRESS_MIRRORED_REPEAT = CLK_ADDRESS_MIRROR,
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#endif
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__CLK_ADDRESS_MASK =
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CLK_ADDRESS_NONE | CLK_ADDRESS_CLAMP | CLK_ADDRESS_CLAMP_TO_EDGE |
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CLK_ADDRESS_REPEAT | CLK_ADDRESS_MIRROR,
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__CLK_ADDRESS_BITS = 3, // number of bits required to
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// represent address info
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__CLK_NORMALIZED_BASE = __CLK_ADDRESS_BITS,
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CLK_NORMALIZED_COORDS_FALSE = 0,
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CLK_NORMALIZED_COORDS_TRUE = 1 << __CLK_NORMALIZED_BASE,
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__CLK_NORMALIZED_MASK =
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CLK_NORMALIZED_COORDS_FALSE | CLK_NORMALIZED_COORDS_TRUE,
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__CLK_NORMALIZED_BITS = 1, // number of bits required to
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// represent normalization
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__CLK_FILTER_BASE = __CLK_NORMALIZED_BASE + __CLK_NORMALIZED_BITS,
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CLK_FILTER_NEAREST = 0 << __CLK_FILTER_BASE,
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CLK_FILTER_LINEAR = 1 << __CLK_FILTER_BASE,
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CLK_FILTER_ANISOTROPIC = 2 << __CLK_FILTER_BASE,
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__CLK_FILTER_MASK =
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CLK_FILTER_NEAREST | CLK_FILTER_LINEAR | CLK_FILTER_ANISOTROPIC,
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__CLK_FILTER_BITS = 2, // number of bits required to
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// represent address info
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__CLK_MIP_BASE = __CLK_FILTER_BASE + __CLK_FILTER_BITS,
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CLK_MIP_NEAREST = 0 << __CLK_MIP_BASE,
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CLK_MIP_LINEAR = 1 << __CLK_MIP_BASE,
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CLK_MIP_ANISOTROPIC = 2 << __CLK_MIP_BASE,
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__CLK_MIP_MASK = CLK_MIP_NEAREST | CLK_MIP_LINEAR | CLK_MIP_ANISOTROPIC,
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__CLK_MIP_BITS = 2,
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__CLK_SAMPLER_BITS = __CLK_MIP_BASE + __CLK_MIP_BITS,
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__CLK_SAMPLER_MASK = __CLK_MIP_MASK | __CLK_FILTER_MASK |
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__CLK_NORMALIZED_MASK | __CLK_ADDRESS_MASK,
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__CLK_ANISOTROPIC_RATIO_BITS = 5,
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__CLK_ANISOTROPIC_RATIO_MASK =
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(int) 0x80000000 >> (__CLK_ANISOTROPIC_RATIO_BITS - 1)
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} clk_sampler_type;
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// Memory synchronization
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#define CLK_LOCAL_MEM_FENCE (1 << 0)
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#define CLK_GLOBAL_MEM_FENCE (1 << 1)
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#endif // CL_COMMON_DEFINES_H
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