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llvm-mirror/lib/CodeGen/SelectionDAG
Sanjay Patel df3286259b [DAGCombiner] don't try to partially reduce add-with-overflow ops
This transform was added with D58874, but there were no tests for overflow ops.
We need to change this one way or another because it can crash as shown in:
https://llvm.org/PR51238

Note that if there are no uses of an overflow op's bool overflow result, we
reduce it to a regular math op, so we continue to fold that case either way.
If we have uses of both the math and the overflow bool, then we are likely
not saving anything by creating an independent sub instruction as seen in
the test diffs here.

This patch makes the behavior in SDAG consistent with what we do in
instcombine AFAICT.

Differential Revision: https://reviews.llvm.org/D106983

(cherry picked from commit fa6b2c9915ba27e1e97f8901ea4aa877f331fb9f)
2021-08-02 13:52:48 -07:00
..
CMakeLists.txt
DAGCombiner.cpp [DAGCombiner] don't try to partially reduce add-with-overflow ops 2021-08-02 13:52:48 -07:00
FastISel.cpp [InstrRef][FastISel] Support emitting DBG_INSTR_REF from fast-isel 2021-07-16 13:56:15 +01:00
FunctionLoweringInfo.cpp [NFC] Wisely nest dyn_cast in FunctionLoweringInfo 2021-03-16 10:22:44 +01:00
InstrEmitter.cpp [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations 2021-07-06 18:31:38 +01:00
InstrEmitter.h [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations 2021-07-06 18:31:38 +01:00
LegalizeDAG.cpp [TargetLowering][AArch64][SVE] Take into account accessed type when clamping address 2021-06-30 13:30:18 +01:00
LegalizeFloatTypes.cpp Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
LegalizeIntegerTypes.cpp [SelectionDAG] Fix the representation of ISD::STEP_VECTOR. 2021-07-21 10:58:40 -07:00
LegalizeTypes.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
LegalizeTypes.h [SelectionDAG][RISCV] Support @llvm.vscale.i64() on 32-bit targets. 2021-07-12 14:53:42 -07:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp [AArch64][SVE] Add support for fixed length MSCATTER/MGATHER 2021-07-01 12:13:59 +01:00
LegalizeVectorTypes.cpp [llvm] Add enum iteration to Sequence 2021-07-21 12:48:53 +00:00
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp [DebugInfo] Fix crash when emitting an invalidated SDDbgValue 2021-05-07 13:13:56 +01:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
SDNodeDbgValue.h [DAG] Ensure all SD classes consistently return a const reference with getDebugLoc(). NFCI. 2021-05-07 14:48:23 +01:00
SelectionDAG.cpp [SelectionDAG] Support scalable-vector splats in yet more cases 2021-07-26 10:15:08 +01:00
SelectionDAGAddressAnalysis.cpp
SelectionDAGBuilder.cpp [AArch64] Legalize MVT::i64x8 in DAG isel lowering 2021-08-02 15:45:58 +01:00
SelectionDAGBuilder.h SwiftTailCC: teach verifier musttail rules applicable to this CC. 2021-05-28 11:12:00 +01:00
SelectionDAGDumper.cpp [ISel] Port AArch64 SABD and UABD to DAGCombine 2021-06-26 19:34:16 +01:00
SelectionDAGISel.cpp [DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs 2021-07-29 15:08:13 +01:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [Statepoint Lowering] Cleanup: remove unused option statepoint-always-spill-base. 2021-05-18 12:15:15 +07:00
StatepointLowering.h More precisely type code used for gc.relocate assertions [nfc] 2021-04-06 11:27:36 -07:00
TargetLowering.cpp [AArch64] Legalize MVT::i64x8 in DAG isel lowering 2021-08-02 15:45:58 +01:00