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f56e4f6d3d
This re-architects the RISCV relocation handling to bring the implementation closer in line with the implementation in binutils. We would previously aggressively resolve the relocation. With this restructuring, we always will emit a paired relocation for any symbolic difference of the type of S±T[±C] where S and T are labels and C is a constant. GAS has a special target hook controlled by `RELOC_EXPANSION_POSSIBLE` which indicates that a fixup may be expanded into multiple relocations. This is used by the RISCV backend to always emit a paired relocation - either ADD[WIDTH] + SUB[WIDTH] for text relocations or SET[WIDTH] + SUB[WIDTH] for a debug info relocation. Irrespective of whether linker relaxation support is enabled, symbolic difference is always emitted as a paired relocation. This change also sinks the target specific behaviour down into the target specific area rather than exposing it to the shared relocation handling. In the process, we also sink the "special" handling for debug information down into the RISCV target. Although this improves the path for the other targets, this is not necessarily entirely ideal either. The changes in the debug info emission could be done through another type of hook as this functionality would be required by any other target which wishes to do linker relaxation. However, as there are no other targets in LLVM which currently do this, this is a reasonable thing to do until such time as the code needs to be shared. Improve the handling of the relocation (and add a reduced test case from the Linux kernel) to ensure that we handle complex expressions for symbolic difference. This ensures that we correct relocate symbols with the adddends normalized and associated with the addition portion of the paired relocation. This change also addresses some review comments from Alex Bradbury about the relocations meant for use in the DWARF CFA being named incorrectly (using ADD6 instead of SET6) in the original change which introduced the relocation type. This resolves the issues with the symbolic difference emission sufficiently to enable building the Linux kernel with clang+IAS+lld (without linker relaxation). Resolves PR50153, PR50156! Fixes: ClangBuiltLinux/linux#1023, ClangBuiltLinux/linux#1143 Reviewed By: nickdesaulniers, maskray Differential Revision: https://reviews.llvm.org/D103539
116 lines
4.6 KiB
C++
116 lines
4.6 KiB
C++
//===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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#undef RISCV
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namespace llvm {
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namespace RISCV {
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enum Fixups {
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// 20-bit fixup corresponding to %hi(foo) for instructions like lui
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fixup_riscv_hi20 = FirstTargetFixupKind,
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// 12-bit fixup corresponding to %lo(foo) for instructions like addi
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fixup_riscv_lo12_i,
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// 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
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fixup_riscv_lo12_s,
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// 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
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fixup_riscv_pcrel_hi20,
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// 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
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fixup_riscv_pcrel_lo12_i,
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// 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
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// instructions
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fixup_riscv_pcrel_lo12_s,
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// 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_got_hi20,
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// 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
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fixup_riscv_tprel_hi20,
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// 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
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fixup_riscv_tprel_lo12_i,
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// 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
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// instructions
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fixup_riscv_tprel_lo12_s,
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// Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
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// hint
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fixup_riscv_tprel_add,
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// 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_tls_got_hi20,
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// 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_tls_gd_hi20,
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// 20-bit fixup for symbol references in the jal instruction
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fixup_riscv_jal,
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// 12-bit fixup for symbol references in the branch instructions
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fixup_riscv_branch,
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// 11-bit fixup for symbol references in the compressed jump instruction
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fixup_riscv_rvc_jump,
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// 8-bit fixup for symbol references in the compressed branch instruction
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fixup_riscv_rvc_branch,
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// Fixup representing a legacy no-pic function call attached to the auipc
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// instruction in a pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call,
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// Fixup representing a function call attached to the auipc instruction in a
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// pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call_plt,
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// Used to generate an R_RISCV_RELAX relocation, which indicates the linker
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// may relax the instruction pair.
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fixup_riscv_relax,
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// Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
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// should fixup the alignment after linker relaxation.
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fixup_riscv_align,
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// 8-bit fixup corresponding to R_RISCV_SET8 for local label assignment.
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fixup_riscv_set_8,
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// 8-bit fixup corresponding to R_RISCV_ADD8 for 8-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_8,
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// 8-bit fixup corresponding to R_RISCV_SUB8 for 8-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_8,
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// 16-bit fixup corresponding to R_RISCV_SET16 for local label assignment.
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fixup_riscv_set_16,
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// 16-bit fixup corresponding to R_RISCV_ADD16 for 16-bit symbolic difference
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// paired reloctions.
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fixup_riscv_add_16,
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// 16-bit fixup corresponding to R_RISCV_SUB16 for 16-bit symbolic difference
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// paired reloctions.
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fixup_riscv_sub_16,
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// 32-bit fixup corresponding to R_RISCV_SET32 for local label assignment.
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fixup_riscv_set_32,
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// 32-bit fixup corresponding to R_RISCV_ADD32 for 32-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_32,
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// 32-bit fixup corresponding to R_RISCV_SUB32 for 32-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_32,
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// 64-bit fixup corresponding to R_RISCV_ADD64 for 64-bit symbolic difference
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// paired relocations.
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fixup_riscv_add_64,
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// 64-bit fixup corresponding to R_RISCV_SUB64 for 64-bit symbolic difference
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// paired relocations.
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fixup_riscv_sub_64,
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// 6-bit fixup corresponding to R_RISCV_SET6 for local label assignment in
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// DWARF CFA.
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fixup_riscv_set_6b,
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// 6-bit fixup corresponding to R_RISCV_SUB6 for local label assignment in
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// DWARF CFA.
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fixup_riscv_sub_6b,
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// Used as a sentinel, must be the last
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fixup_riscv_invalid,
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NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
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};
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} // end namespace RISCV
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} // end namespace llvm
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#endif
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