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811bfa448e
If no scratch or flat instructions are used, we do not need to initialize the flat scratch hardware register. Differential Revision: https://reviews.llvm.org/D105920
42 lines
1.2 KiB
LLVM
42 lines
1.2 KiB
LLVM
; RUN: llc -global-isel=0 -amdgpu-fixed-function-abi=0 -mtriple=amdgcn-amd-amdhsa < %s | FileCheck -check-prefixes=GCN,SDAG %s
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; RUN: llc -global-isel=1 -amdgpu-fixed-function-abi=1 -mtriple=amdgcn-amd-amdhsa < %s | FileCheck -check-prefixes=GCN,GISEL %s
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; GCN-LABEL: {{^}}test_call_undef:
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; GCN: s_endpgm
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define amdgpu_kernel void @test_call_undef() #0 {
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%val = call i32 undef(i32 1)
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%op = add i32 %val, 1
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store volatile i32 %op, i32 addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}test_tail_call_undef:
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; SDAG: s_waitcnt
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; SDAG-NEXT: .Lfunc_end
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; GISEL: s_setpc_b64 s{{\[[0-9]+:[0-9]+\]}}
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define i32 @test_tail_call_undef() #0 {
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%call = tail call i32 undef(i32 1)
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ret i32 %call
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}
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; GCN-LABEL: {{^}}test_call_null:
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; GISEL: s_swappc_b64 s{{\[[0-9]+:[0-9]+\]}}, 0{{$}}
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; GCN: s_endpgm
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define amdgpu_kernel void @test_call_null() #0 {
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%val = call i32 null(i32 1)
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%op = add i32 %val, 1
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store volatile i32 %op, i32 addrspace(1)* null
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ret void
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}
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; GCN-LABEL: {{^}}test_tail_call_null:
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; SDAG: s_waitcnt
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; SDAG-NEXT: .Lfunc_end
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; GISEL: s_setpc_b64 s{{\[[0-9]+:[0-9]+\]$}}
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define i32 @test_tail_call_null() #0 {
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%call = tail call i32 null(i32 1)
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ret i32 %call
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}
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