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985d51d2a5
Fixed bugs https://bugs.llvm.org//show_bug.cgi?id=49643, https://bugs.llvm.org//show_bug.cgi?id=49644, https://bugs.llvm.org//show_bug.cgi?id=49645. Differential Revision: https://reviews.llvm.org/D99413
65 lines
2.8 KiB
LLVM
65 lines
2.8 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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; GCN-LABEL: {{^}}test_add_lit:
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; GFX10: v_add_co_u32 v{{[0-9]+}}, vcc_lo, 0x80992bff, v{{[0-9]+}}
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; GFX10: v_add_co_ci_u32_e32 v{{[0-9]+}}, vcc_lo, 0xe7, v{{[0-9]+}}, vcc_lo
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; GFX9: v_mov_b32_e32 [[C2:v[0-9]+]], 0xe7
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; GFX9: v_add_co_u32_e32 v{{[0-9]+}}, vcc, 0x80992bff, v{{[0-9]+}}
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; GFX9: v_addc_co_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, [[C2]], vcc
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define amdgpu_kernel void @test_add_lit(i64 addrspace(1)* %p) {
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%id = tail call i32 @llvm.amdgcn.workitem.id.x()
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%ptr = getelementptr inbounds i64, i64 addrspace(1)* %p, i32 %id
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%load = load i64, i64 addrspace(1)* %ptr, align 8
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%add = add nsw i64 %load, 994294967295
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store i64 %add, i64 addrspace(1)* %ptr, align 8
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ret void
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}
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; GCN-LABEL: {{^}}test_cndmask_lit:
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; GFX10: v_cndmask_b32_e32 v{{[0-9]+}}, 0x3039, v{{[0-9]+}}, vcc_lo
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; GFX9: v_mov_b32_e32 [[C:v[0-9]+]], 0x3039
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; GFX9: v_cndmask_b32_e32 v{{[0-9]+}}, [[C]], v{{[0-9]+}}, vcc
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define amdgpu_kernel void @test_cndmask_lit(i32 addrspace(1)* %p) {
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%id = tail call i32 @llvm.amdgcn.workitem.id.x()
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%n = add nuw nsw i32 %id, 1
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%p1 = getelementptr inbounds i32, i32 addrspace(1)* %p, i32 %id
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%v1 = load i32, i32 addrspace(1)* %p1, align 4
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%p2 = getelementptr inbounds i32, i32 addrspace(1)* %p, i32 %n
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%v2 = load i32, i32 addrspace(1)* %p2, align 4
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%cmp = icmp sgt i32 %v1, 0
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%sel = select i1 %cmp, i32 12345, i32 %v2
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store i32 %sel, i32 addrspace(1)* %p1, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_bfe_2lit_s:
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; GFX10: v_mov_b32_e32 [[C1:v[0-9]+]], 0xddd5
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; GFX10: v_bfe_u32 v{{[0-9]+}}, 0x3039, s{{[0-9]+}}, [[C1]]
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; GFX9-DAG: v_mov_b32_e32 [[C2:v[0-9]+]], 0xddd5
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; GFX9-DAG: s_movk_i32 [[C1:s[0-9]+]], 0x3039
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; GFX9: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, [[C2]]
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define amdgpu_kernel void @test_bfe_2lit_s(i32 addrspace(1)* %p, i32 %src) {
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%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 12345, i32 %src, i32 56789)
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store i32 %bfe, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_bfe_2lit_v:
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; GFX10: s_movk_i32 [[C1:s[0-9]+]], 0x3039
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; GFX10: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, 0xddd5
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; GFX9-DAG: v_mov_b32_e32 [[C2:v[0-9]+]], 0xddd5
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; GFX9-DAG: s_movk_i32 [[C1:s[0-9]+]], 0x3039
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; GFX9: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, [[C2]]
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define amdgpu_kernel void @test_bfe_2lit_v(i32 addrspace(1)* %p) {
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%id = tail call i32 @llvm.amdgcn.workitem.id.x()
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%ptr = getelementptr inbounds i32, i32 addrspace(1)* %p, i32 %id
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%load = load i32, i32 addrspace(1)* %ptr, align 4
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%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 12345, i32 %load, i32 56789)
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store i32 %bfe, i32 addrspace(1)* %ptr, align 4
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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declare i32 @llvm.amdgcn.ubfe.i32(i32, i32, i32)
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