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196e7f3138
Replace individual operands GLC, SLC, and DLC with a single cache_policy bitmask operand. This will reduce the number of operands in MIR and I hope the amount of code. These operands are mostly 0 anyway. Additional advantage that parser will accept these flags in any order unlike now. Differential Revision: https://reviews.llvm.org/D96469
67 lines
1.7 KiB
YAML
67 lines
1.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-insert-waitcnts -o - %s | FileCheck -check-prefix=GCN %s
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# Make sure no waitcnt is inserted for meta instruction uses.
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---
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name: waitcnt_kill
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GCN-LABEL: name: waitcnt_kill
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; GCN: S_WAITCNT 0
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; GCN: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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; GCN: KILL $vgpr0
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$vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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KILL $vgpr0
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...
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---
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name: waitcnt_implicit_def
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GCN-LABEL: name: waitcnt_implicit_def
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; GCN: S_WAITCNT 0
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; GCN: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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; GCN: $vgpr0 = IMPLICIT_DEF
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$vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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$vgpr0 = IMPLICIT_DEF
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...
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---
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name: waitcnt_eh_label
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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; GCN-LABEL: name: waitcnt_eh_label
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; GCN: S_WAITCNT 0
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; GCN: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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; GCN: EH_LABEL <mcsymbol Ltmp0>, implicit $vgpr0
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$vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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EH_LABEL <mcsymbol Ltmp0>, implicit $vgpr0
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...
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---
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name: waitcnt_cfi
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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; GCN-LABEL: name: waitcnt_cfi
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; GCN: S_WAITCNT 0
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; GCN: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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; GCN: CFI_INSTRUCTION offset $vgpr0_lo16, 16
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$vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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CFI_INSTRUCTION offset $vgpr0, 16
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...
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