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3f021fa672
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail. If the tail is not folded, we know that End - Start >= Step (either statically or through the minimum iteration checks). We also know that both Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + %Step == %End. Hence we must exit the loop before %IV + %Step unsigned overflows and we can mark the induction increment as NUW. This should make SCEV return more precise bounds for the created vector loops, used by later optimizations, like late unrolling. At the moment quite a few tests still need to be updated, but before doing so I'd like to get initial feedback to make sure I am not missing anything. Note that this could probably be further improved by using information from the original IV. Attempt of modeling of the assumption in Alive2: https://alive2.llvm.org/ce/z/H_DL_g Part of a set of fixes required for PR50412. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D103255
101 lines
6.5 KiB
LLVM
101 lines
6.5 KiB
LLVM
; RUN: opt -S -loop-vectorize -instcombine -force-vector-interleave=1 -force-vector-width=4 -force-target-supports-scalable-vectors=true -scalable-vectorization=on < %s | FileCheck %s --check-prefix=CHECKUF1
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; RUN: opt -S -loop-vectorize -instcombine -force-vector-interleave=2 -force-vector-width=4 -force-target-supports-scalable-vectors=true -scalable-vectorization=on < %s | FileCheck %s --check-prefix=CHECKUF2
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; CHECKUF1: for.body.preheader:
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; CHECKUF1-DAG: %wide.trip.count = zext i32 %N to i64
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; CHECKUF1-DAG: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF1-DAG: %[[VSCALEX4:.*]] = shl i64 %[[VSCALE]], 2
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; CHECKUF1-DAG: %min.iters.check = icmp ugt i64 %[[VSCALEX4]], %wide.trip.count
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; CHECKUF1: vector.ph:
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; CHECKUF1-DAG: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF1-DAG: %[[VSCALEX4:.*]] = shl i64 %[[VSCALE]], 2
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; CHECKUF1-DAG: %n.mod.vf = urem i64 %wide.trip.count, %[[VSCALEX4]]
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; CHECKUF1: %n.vec = sub nsw i64 %wide.trip.count, %n.mod.vf
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; CHECKUF1: vector.body:
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; CHECKUF1: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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; CHECKUF1: %[[IDXB:.*]] = getelementptr inbounds double, double* %b, i64 %index
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; CHECKUF1: %[[IDXB_CAST:.*]] = bitcast double* %[[IDXB]] to <vscale x 4 x double>*
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; CHECKUF1: %wide.load = load <vscale x 4 x double>, <vscale x 4 x double>* %[[IDXB_CAST]], align 8, !alias.scope !0
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; CHECKUF1: %[[FADD:.*]] = fadd <vscale x 4 x double> %wide.load, shufflevector (<vscale x 4 x double> insertelement (<vscale x 4 x double> poison, double 1.000000e+00, i32 0), <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer)
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; CHECKUF1: %[[IDXA:.*]] = getelementptr inbounds double, double* %a, i64 %index
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; CHECKUF1: %[[IDXA_CAST:.*]] = bitcast double* %[[IDXA]] to <vscale x 4 x double>*
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; CHECKUF1: store <vscale x 4 x double> %[[FADD]], <vscale x 4 x double>* %[[IDXA_CAST]], align 8, !alias.scope !3, !noalias !0
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; CHECKUF1: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF1: %[[VSCALEX4:.*]] = shl i64 %[[VSCALE]], 2
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; CHECKUF1: %index.next = add nuw i64 %index, %[[VSCALEX4]]
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; CHECKUF1: %[[CMP:.*]] = icmp eq i64 %index.next, %n.vec
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; CHECKUF1: br i1 %[[CMP]], label %middle.block, label %vector.body, !llvm.loop !5
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; For an interleave factor of 2, vscale is scaled by 8 instead of 4 (and thus shifted left by 3 instead of 2).
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; There is also the increment for the next iteration, e.g. instead of indexing IDXB, it indexes at IDXB + vscale * 4.
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; CHECKUF2: for.body.preheader:
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; CHECKUF2-DAG: %wide.trip.count = zext i32 %N to i64
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; CHECKUF2-DAG: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF2-DAG: %[[VSCALEX8:.*]] = shl i64 %[[VSCALE]], 3
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; CHECKUF2-DAG: %min.iters.check = icmp ugt i64 %[[VSCALEX8]], %wide.trip.count
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; CHECKUF2: vector.ph:
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; CHECKUF2-DAG: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF2-DAG: %[[VSCALEX8:.*]] = shl i64 %[[VSCALE]], 3
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; CHECKUF2-DAG: %n.mod.vf = urem i64 %wide.trip.count, %[[VSCALEX8]]
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; CHECKUF2: %n.vec = sub nsw i64 %wide.trip.count, %n.mod.vf
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; CHECKUF2: vector.body:
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; CHECKUF2: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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; CHECKUF2: %[[IDXB:.*]] = getelementptr inbounds double, double* %b, i64 %index
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; CHECKUF2: %[[IDXB_CAST:.*]] = bitcast double* %[[IDXB]] to <vscale x 4 x double>*
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; CHECKUF2: %wide.load = load <vscale x 4 x double>, <vscale x 4 x double>* %[[IDXB_CAST]], align 8, !alias.scope !0
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; CHECKUF2: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32()
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; CHECKUF2: %[[VSCALE2:.*]] = shl i32 %[[VSCALE]], 2
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; CHECKUF2: %[[VSCALE2_EXT:.*]] = sext i32 %[[VSCALE2]] to i64
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; CHECKUF2: %[[IDXB_NEXT:.*]] = getelementptr inbounds double, double* %[[IDXB]], i64 %[[VSCALE2_EXT]]
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; CHECKUF2: %[[IDXB_NEXT_CAST:.*]] = bitcast double* %[[IDXB_NEXT]] to <vscale x 4 x double>*
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; CHECKUF2: %wide.load{{[0-9]+}} = load <vscale x 4 x double>, <vscale x 4 x double>* %[[IDXB_NEXT_CAST]], align 8, !alias.scope !0
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; CHECKUF2: %[[FADD:.*]] = fadd <vscale x 4 x double> %wide.load, shufflevector (<vscale x 4 x double> insertelement (<vscale x 4 x double> poison, double 1.000000e+00, i32 0), <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer)
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; CHECKUF2: %[[FADD_NEXT:.*]] = fadd <vscale x 4 x double> %wide.load{{[0-9]+}}, shufflevector (<vscale x 4 x double> insertelement (<vscale x 4 x double> poison, double 1.000000e+00, i32 0), <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer)
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; CHECKUF2: %[[IDXA:.*]] = getelementptr inbounds double, double* %a, i64 %index
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; CHECKUF2: %[[IDXA_CAST:.*]] = bitcast double* %[[IDXA]] to <vscale x 4 x double>*
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; CHECKUF2: store <vscale x 4 x double> %[[FADD]], <vscale x 4 x double>* %[[IDXA_CAST]], align 8, !alias.scope !3, !noalias !0
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; CHECKUF2: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32()
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; CHECKUF2: %[[VSCALE2:.*]] = shl i32 %[[VSCALE]], 2
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; CHECKUF2: %[[VSCALE2_EXT:.*]] = sext i32 %[[VSCALE2]] to i64
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; CHECKUF2: %[[IDXA_NEXT:.*]] = getelementptr inbounds double, double* %[[IDXA]], i64 %[[VSCALE2_EXT]]
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; CHECKUF2: %[[IDXA_NEXT_CAST:.*]] = bitcast double* %[[IDXA_NEXT]] to <vscale x 4 x double>*
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; CHECKUF2: store <vscale x 4 x double> %[[FADD_NEXT]], <vscale x 4 x double>* %[[IDXA_NEXT_CAST]], align 8, !alias.scope !3, !noalias !0
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; CHECKUF2: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
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; CHECKUF2: %[[VSCALEX8:.*]] = shl i64 %[[VSCALE]], 3
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; CHECKUF2: %index.next = add nuw i64 %index, %[[VSCALEX8]]
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; CHECKUF2: %[[CMP:.*]] = icmp eq i64 %index.next, %n.vec
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; CHECKUF2: br i1 %[[CMP]], label %middle.block, label %vector.body, !llvm.loop !5
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define void @loop(i32 %N, double* nocapture %a, double* nocapture readonly %b) {
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entry:
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%cmp7 = icmp sgt i32 %N, 0
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br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %N to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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ret void
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds double, double* %b, i64 %indvars.iv
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%0 = load double, double* %arrayidx, align 8
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%add = fadd double %0, 1.000000e+00
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%arrayidx2 = getelementptr inbounds double, double* %a, i64 %indvars.iv
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store double %add, double* %arrayidx2, align 8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !1
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}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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